• 제목/요약/키워드: error elimination

검색결과 156건 처리시간 0.023초

채널 오류율 추정에 기반을 둔 길쌈부호의 개선된 재구성 알고리즘 (An Improved Reconstruction Algorithm of Convolutional Codes Based on Channel Error Rate Estimation)

  • 성진우;정하봉
    • 한국통신학회논문지
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    • 제42권5호
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    • pp.951-958
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    • 2017
  • 채널 재구성 기법이란 통신시스템에서 의도되지 않은 수신자가 수신 신호로부터 어떤 채널 부호가 사용되었는지, 주요 파라미터는 무엇인지를 알아내는 기법이다. 본 논문은 수신한 신호가 길쌈부호로 부호화된 경우, 사용된 길쌈부호의 주요파라미터인 입출력단의 비트수인 k와 n, 그리고 $k{\times}n$ 생성다항식행렬(Polynomial Generator Matrix, PGM)을 찾아내는 기법에 대해 다룬다. 본 논문은 M. Marazin 등이 제안한, 피버팅을 통한 가우스 조단소거법(Gauss Jordan Elimination Through Pivoting, GJETP)을 사용한 길쌈부호의 채널 재구성 기법에서 채널오류율과 무관하게 임계값을 설정해주던 것과 달리, 수신한 시퀀스로부터 2진 대칭 채널(Bynary Symetric Channel, BSC)의 채널오류확률을 추정하고 이로부터 임계값을 설정하는 방식을 제안하고, S. Shaojing 등의 연판정(soft decision) 값을 이용한 기법을 적용시켜서 채널 재구성 기법의 성공률을 향상시켰다.

SSLNR 기반의 ZF-THP를 위한 새로운 빔형성 기법 (New Beamforming Technique for ZF-THP Based on SSLNR)

  • 조용석;변윤식
    • 한국통신학회논문지
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    • 제38A권4호
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    • pp.350-359
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    • 2013
  • 본 논문에서는 협력 빔형성(Coordinated Multi-Point Coordinated Beamforming : CoMP CB) 시나리오에서 인접한 사용자들 때문에 발생되는 간섭(Inter User Interference : IUI)을 제거하기 위해 사용된 Block Diagonal Geometric Mean Decomposition(BD-GMD)기반의 IUI 제거 알고리즘을 Successive Signal to Leakage plus Noise Ratio(SSLNR) 환경에서의 ZF(Zero-Forcing)에 적용하여 누출 전력을 제거한다. 또 IUI 제거 알고리즘을 사용했을 시 문제가 되는 원하는 신호 전력(Desired signal power)의 크기를 크게 보장할 수 없다는 점을 보완하기 위해 적절한 채널 열 순열(Channel ordering)을 수행하여 원하는 신호의 전력을 높인다. IUI 제거 알고리즘 사용과 적절한 채널 열 순열을 통해 기존의 SSLNR-Zero-Forcing Tomlinson Harashima precoding(ZF-THP) 기법보다 더 나은 비트오류확률(Bit Error Rate : BER)성능을 낼 수 있다.

클락 오프셋 추정 방식을 이용한 TWR WPAN 측위 시스템 (A Two-Way Ranging WPAN Location System with Clock Offset Estimation)

  • 박지원;임정민;이규진;성태경
    • 제어로봇시스템학회논문지
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    • 제19권2호
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    • pp.125-130
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    • 2013
  • Compared to OWR (One-Way Ranging) method that requires precise network time synchronization, TWR (Two-Way Ranging) method has advantages in building an indoor WPAN (Wireless Personal Area Network) location system with lower cost. However, clock offsets of nodes in WPAN system should be eliminated or compensated to improve location accuracy of the TWR method. Because conventional clock offset elimination methods requires multiple TWR transactions to reduce clock offset, they produce network traffic burden instead. This paper presents a clock offset estimation method that can reduce clock offset error with a single TWR transaction. After relative clock offsets of sensor nodes are estimated, clock offsets of mobile tags are estimated using a single TWR communication. Simulation results show that location accuracy of the proposed method is almost similar to the conventional clock offset elimination method, while its network traffic is about a half of the conventional method.

Comparison of Circuit Reduction Techniques for Power Network Noise Analysis

  • Kim, Jin-Wook;Kim, Young-Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제9권4호
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    • pp.216-224
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    • 2009
  • The endless scaling down of the semiconductor process made the impact of the power network noise on the performance of the state-of-the-art chip a serious design problem. This paper compares the performances of two popular circuit reduction approaches used to improve the efficiency of power network noise analysis: moment matching-based model order reduction (MOR) and node elimination-based MOR. As the benchmarks, we chose PRIMA and R2Power as the matching-based MOR and the node elimination-based MOR. Experimental results indicate that the accuracy, efficiency, and memory requirement of both methods very strongly depend on the structure of the given circuit, i.e., numbers of the nodes and sources, and the number of moments to preserve for PRIMA. PRIMA has higher accuracy in general, while the error of R2Power is also in the acceptable range. On the other hand, PRIMA has the higher efficiency than R2Power, only when the numbers of nodes and sources are small enough. Otherwise, R2Power clearly outperforms PRIMA in efficiency. In the memory requirement, the memory size of PRIMA increases very quickly as the numbers of nodes, sources, and preserved moments increase.

공진배제를 위한 스템핑 모터의 폐회로제어에 관한 연구 (A Study on Closed-Loop Control of a Stepping Motor for Resonance Elimination)

  • 노상현;김교형
    • 대한기계학회논문집
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    • 제15권1호
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    • pp.90-97
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    • 1991
  • 본 연구에서는 하이브리드 스텝핑 모터의 공진 배제를 위한 폐회로제어시스템 을 개발하였고 펄스 발생, 위치 및 속도변화, 가감속제어, 정여괴전방향결정, 카운트 및 스텝핑 모터의 온/오프기능 등을 하드웨어 대신 마이크로컴퓨터를 이용한 소프트웨 어로 대치하였으며, 구동회로의 복잡함을 피하기 위해 스텝핑 모터의 전용제어기인 PMM8713IC를 사용하였고 궤환정보는 샤프트 엔코더를 사용하였다.그리고 리드 스크 루우를 사용한 1축 테이블을 제작하여 개회로제어시와 폐회로제어시의 동특성 및 공진 현상을 검토하였다.

광대역 접지임피던스 측정기의 설계 및 제작 (Design and Fabrication of a Wideband Ground Impedance Meter)

  • 길경석;박대원;장운용;한주섭;길형준
    • 한국전기전자재료학회논문지
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    • 제23권10호
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    • pp.793-797
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    • 2010
  • The basic performance of the ground system is evaluated as the ground resistance by applying low frequency current below 1 kHz. However, characteristics of the ground system should be analyzed by high frequency current up to 1 MHz since transient currents having a few hundred kHz component flow during a line-to-ground fault and/or a lightning strike. This paper deals with the design and fabrication of a wideband ground impedance meter (WGIM) which measures the impedance of ground systems in ranges from 65 Hz to 1.28 MHz. Also, a noise elimination algorithm using a digital bandpass filter is proposed. The maximum error of the WGIM is 4.91% in the measurement frequency range.

AR 모델을 이용한 수면중 뇌파 및 안전도 신호에서의 심전도 잡음 제거에 관한 연구 (A Study on the Elimination of ECG Artifact in Polysomnographic EEG and EOG using AR model)

  • 박해정;한주만;정도언;박광석
    • 대한의용생체공학회:학술대회논문집
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    • 대한의용생체공학회 1997년도 추계학술대회
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    • pp.459-463
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    • 1997
  • In this paper, we present the elimination of ECG artifact from the polysomnographic EEG and EOG. The idea of this method is that the ECG synchronized EEG segment is detected from ECG and regard samples of that segment a missing signal. After this, we used two interpolation methods to recover the missing segment. One is the Lagrange Polynomial Interpolation Method and the other is the Least Square Error AR Interpolation method. We tested those methods by applying to simulated signals. AR methods works well enough to reject the artifact about 10% of the main artifact level. We practically applied to real EEG and EOG signals. We also developed the algorithm to detect whether the artifact level is high or not. If the artifact level is high, then the interpolations are applied.

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움직임 추정오차의 예측을 이용한 고속 움직임 추정 방법 (A fast motion estimation method prediction of motion estimation error)

  • 강현수
    • 한국통신학회논문지
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    • 제29권9C호
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    • pp.1323-1329
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    • 2004
  • 본 논문은 고속 전역탐색법 중의 하나인 MSEA(multi level successive elimination algorithm)를 개선한 방식으로서, MSEA의 단계에 따른 norm의 계산 결과를 이용하여 최종 단계의 SAD를 예측함으로써 더 이상의 단계를 수행할 필요가 없다고 판단되는 단계의 계산을 생략함으로써 계산 량을 감소시키는 방법을 제안한다. 각 단계별 SAD의 예측을 위해 norm에 대한 이론적 분석이 이루어지며 실험을 통해 분석내용을 검증하고, 이를 바탕으로 새로운 알고리즘을 제안하고 실험을 통해 제안된 알고리즘의 성능을 평가한다.

한 개의 선형 여유센서를 갖는 스튜어트 플랫폼의 실시간 순기구학 (Real-Time Forward Kinematics of the 6-6 Stewart Platform with One Extra Linear Sensor)

  • 심재경;이태영
    • 대한기계학회논문집A
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    • 제25권9호
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    • pp.1384-1390
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    • 2001
  • This paper deals with the forward kinematics of the 6-6 Stewart platform of planar base and moving platform using one extra linear sensor. Based on algebraic elimination method, it first derives an 8th-degree univariate equation and then finds tentative solution sets out of which the actual solution is to be selected. In order to provide more exact solution despite the error between measured sensor value and the theoretic alone, a correction method is also used in this paper. The overall procedure requires so little computation time that it can be efficiently used for real-time applications. In addition, unlike the iterative scheme e.g. Newton-Raphson, the algorithm does not require initial estimates of solution and is free of the problems that it does not converge to actual solution within limited time. The presented method has been implemented in C language and a numerical example is given to confirm the effectiveness and accuracy of the developed algorithm.

SSTDR을 이용한 케이블의 접촉 불량 고장 진단 (Diagnosis of Poor Contact Fault in the Power Cable Using SSTDR)

  • 김택희;전정채
    • 전기학회논문지
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    • 제65권8호
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    • pp.1442-1449
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    • 2016
  • This paper proposes a diagnosis to detecting poor contact fault and fault location. Electrical fire by poor contact fault of power cable occupied a large proportion in the total electrical installations. The proposed method has an object to prevent electrical fault in advance. But detecting poor contact fault is difficult to detect fault type and fault location by using conventional reflectometry due to faults generated intermittently and repeatedly on the time change. Therefore, in this paper poor contact fault and fault conditions were defined. System generating poor contact fault produced for the experimental setup. SSTDR and algorithm of reference signal elimination heighten performance detecting poor contact fault on live power cable. The diagnosis methods of signal process and analysis of reflected signal was proposed for detecting poor contact fault and fault location. The poor contact fault and location had been detected through proposed diagnosis methods. The fault location and error rate of detection were verified detecting accuracy by experiment results.