• International Journal of Computer Science & Network Security
• /
• v.21 no.3
• /
• pp.60-70
• /
• 2021

In this paper we study the problem of implementation of security issues of blue tooth, especially secure simple pairing, with the help of an efficient four user authenticated key (4UAK) for an elliptic curve cryptography (ECC). This paper also deals with the design, implement and performance evaluation of secure simple pairing (SSP) using an elliptic curve cryptography, such as Diffie Hellman protocol when four users are involved. Here, we also compute the best, worst and average case step counts (time complexities). This work puts forth an efficient way of providing security in blue tooth. The time complexity of O(n⁴) is achieved using Rabin Miller Primality methodology. The method also reduces the calculation price and light communication loads.

• Journal of Advanced Information Technology and Convergence
• /
• v.8 no.2
• /
• pp.1-11
• /
• 2018

Multimedia contents have been increasingly available over the Internet as wireless networks systems are continuously growing popular. Unlimited access from various users has led to unauthorized access of third parties or adversaries. This paper deals with the implementation of elliptic curve cryptography (ECC) based user authentication for securing multimedia contents over the Internet. The ECC technique has been incorporated with the advanced encryption standard (AES) algorithm to ensure the complexity of the proposed authentication scheme and to guarantee authenticity of multimedia services.

• Journal of information and communication convergence engineering
• /
• v.2 no.3
• /
• pp.182-186
• /
• 2004

When most of existing instant messengers log on server, they transmit to sever in encoding password to RC5. but RC5 don't be secured because it has been known many of password cracking tools. Also, messengers don't have any protection on the transmitted information with communicating two hosts since loging on, endangering the privacy of the user. As a counter measure, messengers need to provide security service including message encryption. In this paper, we designed a key exchange method of password representing fast, effective and high security degree, using ECC(Elliptic Curve Cryptography) that being known the very stronger than another public key cryptography with same key size. To effectively improve data transmission and its security using IPSec protocol between users, tunnel mode is introduced. Tunnel mode transmits Host-to-Host data through virtual pipelines on the Internet.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2021.05a
• /
• pp.63-65
• /
• 2021

This paper describes an integrated H/W-S/W implementation of elliptic curve digital signature algorithm (EC-DSA) using a security system-on-chip (SoC). The security SoC uses the Cortex-A53 APU as CPU, and the hardware IPs of high-performance elliptic curve cryptography (HP-ECC) core and SHA3 (secure hash algorithm 3) hash function core are interfaced via AXI4-Lite bus protocol. The signature generation and verification processes of EC-DSA were verified by the implementation of the security SoC on a Zynq UltraScale+ MPSoC device.

• Proceedings of the Korea Institutes of Information Security and Cryptology Conference
• /
• 2001.11a
• /
• pp.407-410
• /
• 2001

본 논문에서는 자바 카드용 ECC (Elliptic Curve Cryptosystems) 및 ECDSA (Elliptic Curve Digital Signature Algorithm) 알고리즘 구현 및 시험 결과에 대해 언급하고자 한다. 163비트 타원곡선 암호시스템(ECC)은 현재 많이 사용되고 있는 RSA 1024 비트 이상의 안전성을 보장한다. 또한, 짧은 키 길이를 사용하기 때문에 메모리와 처리능력이 제한된 스마트 카드나 이동 통신 등과 같은 분야에서 매우 유용하게 사용될 수 있으며, ECC나 ECDSA를 자바 카드 상에 구현하여 사용함으로써 사용자들은 보다 강화된 보안성과 안전성을 제공받을 수 있을 것이다.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.24 no.11
• /
• pp.1470-1476
• /
• 2020

This paper describes a design of a lightweight security system-on-chip (SoC) suitable for the implementation of security protocols for IoT and mobile devices. The security SoC using Cortex-M0 as a CPU integrates hardware crypto engines including an elliptic curve cryptography (ECC) core, a SHA3 hash core, an ARIA-AES block cipher core and a true random number generator (TRNG) core. The ECC core was designed to support twenty elliptic curves over both prime field and binary field defined in the SEC2, and was based on a word-based Montgomery multiplier in which the partial product generations/additions and modular reductions are processed in a sub-pipelining manner. The H/W-S/W co-operation for elliptic curve digital signature algorithm (EC-DSA) protocol was demonstrated by implementing the security SoC on a Cyclone-5 FPGA device. The security SoC, synthesized with a 65-nm CMOS cell library, occupies 193,312 gate equivalents (GEs) and 84 kbytes of RAM.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2016.10a
• /
• pp.762-764
• /
• 2016

The ECQV(Elliptic Curve Qu-Vanstone) is a implicit certificate scheme based on ECC(Elliptic Curve Cryptography). Implicit certificates are smaller and faster than a traditional explicit certificate. Therefore, it can be used in a memory or bandwidth constraint communication environments. Also, the butterfly key expansion algorithm is a method to issue many certificates by using only one public key. In this study, by applying the butterfly key expansion algorithm to ECQV, we suggest a new useful issuing certificate method that can be used in vehicular communication environments.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.21 no.7
• /
• pp.1267-1275
• /
• 2017

This paper describes a design of cryptographic processor supporting 233-bit elliptic curves over binary field defined by NIST. Scalar point multiplication that is core arithmetic in elliptic curve cryptography(ECC) was implemented by adopting modified Montgomery ladder algorithm, making it robust against simple power analysis attack. Point addition and point doubling operations on elliptic curve were implemented by finite field multiplication, squaring, and division operations over $GF(2^{233})$, which is based on affine coordinates. Finite field multiplier and divider were implemented by applying shift-and-add algorithm and extended Euclidean algorithm, respectively, resulting in reduced gate counts. The ECC processor was verified by FPGA implementation using Virtex5 device. The ECC processor synthesized using a 0.18 um CMOS cell library occupies 49,271 gate equivalents (GEs), and the estimated maximum clock frequency is 345 MHz. One scalar point multiplication takes 490,699 clock cycles, and the computation time is 1.4 msec at the maximum clock frequency.

• Journal of IKEEE
• /
• v.23 no.1
• /
• pp.58-67
• /
• 2019

A design of an elliptic curve cryptography (ECC) processor that supports both pseudo-random curves and Koblitz curves over $GF(2^m)$ defined by the NIST standard is described in this paper. A finite field arithmetic circuit based on a word-based Montgomery multiplier was designed to support five key lengths using a datapath of fixed size, as well as to achieve a lightweight hardware implementation. In addition, Lopez-Dahab's coordinate system was adopted to remove the finite field division operation. The ECC processor was implemented in the FPGA verification platform and the hardware operation was verified by Elliptic Curve Diffie-Hellman (ECDH) key exchange protocol operation. The ECC processor that was synthesized with a 180-nm CMOS cell library occupied 10,674 gate equivalents (GEs) and a dual-port RAM of 9 kbits, and the maximum clock frequency was estimated at 154 MHz. The scalar multiplication operation over the 223-bit pseudo-random elliptic curve takes 1,112,221 clock cycles and has a throughput of 32.3 kbps.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.23 no.12
• /
• pp.1609-1617
• /
• 2019

Described in this paper is a design of hardware accelerator for implementing public-key cryptographic protocols (PKCPs) based on Elliptic Curve Cryptography (ECC) and RSA. It supports five elliptic curves (ECs) over GF(p) and three key lengths of RSA that are defined by NIST standard. It was designed to support four point operations over ECs and six modular arithmetic operations, making it suitable for hardware implementation of ECC- and RSA-based PKCPs. In order to achieve small-area implementation, a finite field arithmetic circuit was designed with 32-bit data-path, and it adopted word-based Montgomery multiplication algorithm, the Jacobian coordinate system for EC point operations, and the Fermat's little theorem for modular multiplicative inverse. The hardware operation was verified with FPGA device by implementing EC-DH key exchange protocol and RSA operations. It occupied 20,800 gate equivalents and 28 kbits of RAM at 50 MHz clock frequency with 180-nm CMOS cell library, and 1,503 slices and 2 BRAMs in Virtex-5 FPGA device.