• Journal of the Korean Crystal Growth and Crystal Technology
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• v.20 no.1
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• pp.1-6
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• 2010

CuInGaSe(CIGS) mixed-source was prepared by hydride vapor phase epitaxy (HVPE). Each metal was mixed in regular ratio and soaked at $1090^{\circ}C$ for 90 minutes in nitrogen atmosphere. After making the mixed-source to powder state, the pellet was made by the powder. The diameter of pellet is 10 mm. The CIGS thin film was deposited on soda lime glass evaporated Mo layer bye-beam evaporator. To confirm the crystallization, we measured X-ray diffraction (XRD). High intensity X-ray peaks diffracted from (112), (204)/(220), (116)/(312) and (400) of CIGS thin film and from (110) of Mo were confirmed by XRD measurement.

• Korean Journal of Optics and Photonics
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• v.23 no.1
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• pp.12-16
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• 2012

In the paper, we fabricated a Ni master with $45^{\circ}$-mirror structures for flexible waveguide fabrication. The flexible waveguide films with embedded $45^{\circ}$-angled mirrors at the waveguide ends were successfully fabricated using a UV-imprint process. Next, in order to enhance the reflectivity of the mirrors, Ni(3 nm)-Au(200 nm) bilayers were evaporated on the $45^{\circ}$-angled facets through a locally opened thin mask using an electron beam evaporator. We measured propagation loss, bending loss, mirror loss and bending reliability of the fabricated waveguide.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.4
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• pp.39-46
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• 2003

Sn-Cu eutectic solder bump was fabricated by electroplating for flip chip and its characteristics were studied. A Si-wafer was used as a substrate and the UBM(Under Bump Metallization) of Al(400 nm)/Cu(300 nm)/Ni(400 nm)/Au(20 nm) was coated sequentially from the substrate to the top by an electron beam evaporator. The experimental results showed that the plating ratio of the Sn-Cu increased from 0.25 to 2.7 $\mu\textrm{m}$/min with the current density of 1 to 8 A/d$\m^2$. In this range of current density the plated Sn-Cu maintains its composition nearly constant level as Sn-0.9∼1.4 wt%/Cu. The solder bump of typical mushroom shape with its stem diameter of 120 $\mu\textrm{m}$ was formed through plating at 5 A/d$\m^2$ for 2 hrs. The mushroom bump changed its shape to the spherical type of 140 $\mu\textrm{m}$ diameter by air reflow at $260^{\circ}C$. The homogeneity of chemical composition for the solder bump was examined, and Sn content in the mushroom bump appears to be uneven. However, the Sn distributed more uniformly through an air reflow.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.264-264
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• 2016

최근에 charge trap flash (CTF) 기술은 절연막에 전하를 트랩과 디트랩 시킬 때 인접한 셀 간의 간섭현상을 최소화하여 오동작을 줄일 수 있으며 낸드 플래시 메모리 소자에 적용되고 있다. 낸드 플래시 메모리는 고집적화, 대용량화와 비휘발성 등의 장점으로 인해 핸드폰, USB, MP3와 컴퓨터 등에 이용되고 있다. 기존의 실리콘 기반의 플래시 메모리 소자는 좁은 밴드갭으로 인해 투명하지 않고 고온에서의 공정이 요구되는 문제점이 있다. 따라서, 이러한 문제점을 개선하기 위해 실리콘의 대체 물질로 산화물 반도체 기반의 플래시 메모리 소자들이 연구되고 있다. 산화물 반도체 기반의 플래시 메모리 소자는 넓은 밴드갭으로 인한 투명성을 가지고 있으며 저온에서 공정이 가능하여 투명하고 유연한 기판에 적용이 가능하다. 다양한 산화물 반도체 중에서 비정질 In-Ga-Zn-O (a-IGZO)는 비정질임에도 불구하고 우수한 전기적인 특성과 화학적 안정성을 갖기 때문에 많은 관심을 받고 있다. 플래시 메모리의 고집적화가 요구되면서 절연막에 high-k 물질을 atomic layer deposition (ALD) 방법으로 적용하고 있다. ALD 방법을 이용하면 우수한 계면 흡착력과 균일도를 가지는 박막을 정확한 두께로 형성할 수 있는 장점이 있다. 또한, high-k 물질을 절연막에 적용하면 높은 유전율로 인해 equivalent oxide thickness (EOT)를 줄일 수 있다. 특히, HfOx와 AlOx가 각각 trap layer와 blocking layer로 적용되면 program/erase 동작 속도를 증가시킬 수 있으며 넓은 밴드갭으로 인해 전하손실을 크게 줄일 수 있다. 따라서 본 연구에서는 ALD 방법으로 AlOx와 HfOx를 게이트 절연막으로 적용한 a-IGZO 기반의 thin-film transistor (TFT) 플래시 메모리 소자를 제작하여 메모리 특성을 평가하였다. 제작 방법으로는, p-Si 기판 위에 열성장을 통한 100 nm 두께의 SiO2를 형성한 뒤, 채널 형성을 위해 RF sputter를 이용하여 70 nm 두께의 a-IGZO를 증착하였다. 이후에 소스와 드레인 전극에는 150 nm 두께의 In-Sn-O (ITO)를 RF sputter를 이용하여 증착하였고, ALD 방법을 이용하여 tunnel layer에 AlOx 5 nm, trap layer에 HfOx 20 nm, blocking layer에 AlOx 30 nm를 증착하였다. 최종적으로, 상부 게이트 전극을 형성하기 위해 electron beam evaporator를 이용하여 platinum (Pt) 150 nm를 증착하였고, 계면 결함을 최소화하기 위해 퍼니스에서 질소 가스 분위기, $400^{\circ}C$, 30 분의 조건으로 열처리를 했다. 측정 결과, 103 번의 program/erase를 반복한 endurance와 104 초 동안의 retention 측정으로부터 큰 열화 없이 메모리 특성이 유지되는 것을 확인하였다. 결과적으로, high-k 물질과 산화물 반도체는 고성능과 고집적화가 요구되는 향후 플래시 메모리의 핵심적인 물질이 될 것으로 기대된다.

• Journal of Sensor Science and Technology
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• v.33 no.1
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• pp.40-47
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• 2024

The creation of vertically aligned one-dimensional (1D) nanostructures through the decoration of n-type tin oxide (SnO₂) on p-type chromium oxide (Cr₂O₃) constitutes an effective strategy for enhancing gas sensing performance. These heterostructures are deposited in multiple stages using a glancing angle deposition technique with an electron beam evaporator, resulting in a reduction in the surface porosity of the nanorods as SnO₂ is incorporated. In comparison to Cr₂O₃ films, the bare Cr₂O₃ nanorods exhibits a response 3.3 times greater to 50 ppm H₂S at 300℃, while the SnO₂-decorated Cr₂O₃ nanorods demonstrate an eleven-fold increase in response. Furthermore, when subjected to various gases (CH₄, H₂S, CO₂, H₂), a notable selectivity toward H₂S is observed. This study paves the way for the development of p-type semiconductor sensors with heightened selectivity and sensitivity towards H₂S, thus advancing the prospects of gas sensor technology.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.4
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• pp.1-7
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• 2017

Cobalt silicide was used as a counter electrode in order to confirm its reliability in dye-sensitized solar cell (DSSC) devices. 100 nm-Co/300 nm-Si/quartz was formed by an evaporator and cobalt silicide was formed by vacuum heat treatment at $700^{\circ}C$ for 60 min to form approximately 350 nm-CoSi. This process was followed by etching in $80^{\circ}C$-30% $H_2SO_4$ to remove the cobalt residue on the cobalt silicide surface. Also, for the comparison against Pt, we prepared a 100 nm-Pt/glass counter electrode. Cobalt silicide was used for the counter electrode in order to confirm its reliability in DSSC devices and maintained for 0, 168, 336, 504, 672, and 840 hours at $80^{\circ}C$. The photovoltaic properties of the DSSCs employing cobalt silicide were confirmed by using a simulator and potentiostat. Cyclic-voltammetry, field emission scanning electron microscopy, focused ion beam scanning electron microscopy, and energy dispersive spectrometry analyses were used to confirm the catalytic activity, microstructure, and composition, respectively. The energy conversion efficiency (ECE) as a function of time and ECE of the DSSC with Pt and CoSi counter electrodes were maintained for 504 hours. However, after 672 hours, the ECEs decreased to a half of their initial values. The results of the catalytic activity analysis showed that the catalytic activities of the Pt and CoSi counter electrodes decreased to 64% and 57% of their initial values, respectively(after 840 hours). The microstructure analysis showed that the CoSi layer improved the durability in the electrolyte, but because the stress concentrates on the contact surface between the lower quartz substrate and the CoSi layer, cracks are formed locally and flaking occurs. Thus, deterioration occurs due to the residual stress built up during the silicidation of the CoSi counter electrode, so it is necessary to take measures against these residual stresses, in order to ensure the reliability of the electrode.