• Title/Summary/Keyword: dynamic power consumption

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Power consumption prediction model based on artificial neural networks for seawater source heat pump system in recirculating aquaculture system fish farm (순환여과식 양식장 해수 열원 히트펌프 시스템의 전력 소비량 예측을 위한 인공 신경망 모델)

  • Hyeon-Seok JEONG;Jong-Hyeok RYU;Seok-Kwon JEONG
    • Journal of the Korean Society of Fisheries and Ocean Technology
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    • v.60 no.1
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    • pp.87-99
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    • 2024
  • This study deals with the application of an artificial neural network (ANN) model to predict power consumption for utilizing seawater source heat pumps of recirculating aquaculture system. An integrated dynamic simulation model was constructed using the TRNSYS program to obtain input and output data for the ANN model to predict the power consumption of the recirculating aquaculture system with a heat pump system. Data obtained from the TRNSYS program were analyzed using linear regression, and converted into optimal data necessary for the ANN model through normalization. To optimize the ANN-based power consumption prediction model, the hyper parameters of ANN were determined using the Bayesian optimization. ANN simulation results showed that ANN models with optimized hyper parameters exhibited acceptably high predictive accuracy conforming to ASHRAE standards.

Heuristic based Energy-aware Resource Allocation by Dynamic Consolidation of Virtual Machines in Cloud Data Center

  • Sabbir Hasan, Md.;Huh, Eui-Nam
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.7 no.8
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    • pp.1825-1842
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    • 2013
  • Rapid growth of the IT industry has led to significant energy consumption in the last decade. Data centers swallow an enormous amount of electrical energy and have high operating costs and carbon dioxide excretions. In response to this, the dynamic consolidation of virtual machines (VMs) allows for efficient resource management and reduces power consumption through the live migration of VMs in the hosts. Moreover, each client typically has a service level agreement (SLA), this leads to stipulations in dealing with energy-performance trade-offs, as aggressive consolidation may lead to performance degradation beyond the negotiation. In this paper we propose a heuristic based resource allocation of VM selection and a VM allocation approach that aims to minimize the total energy consumption and operating costs while meeting the client-level SLA. Our experiment results demonstrate significant enhancements in cloud providers' profit and energy savings while improving the SLA at a certain level.

Performance and Power Consumption Improvement of Embedded RISC Core (임베디드 RISC 코어의 성능 및 전력 개선)

  • Jung, Hong-Kyun;Ryoo, Kwang-Ki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.2
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    • pp.453-461
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    • 2010
  • This paper presents a branch prediction algorithm and a 4-way set-associative cache for performance improvement of embedded RISC core and a clock-gating algorithm using ODC (Observability Don't Care) operation to improve the power consumption of the core. The branch prediction algorithm has a structure using BTB(Branch Target Buffer) and 4-way set associative cache has lower miss rate than direct-mapped cache. Pseudo-LRU Policy, which is one of the Line Replacement Policies, is used for decreasing the number of bits that store LRU value. The clock gating algorithm reduces dynamic power consumption. As a result of estimation of performance and dynamic power, the performance of the OpenRISC core applied the proposed architecture is improved about 29% and dynamic power of the core using Chartered $0.18{\mu}m$ technology library is reduced by 16%.

Design of a 12-bit, 10-Msps SAR A/D Converter with different sampling time applied to the bit-switches within C-DAC (C-DAC 비트 스위치에 다른 샘플링 시간을 인가하는 12-bit, 10-Msps SAR A/D 변환기 설계)

  • Shim, Minsoo;Yoon, Kwangsub;Lee, Jonghwan
    • Journal of IKEEE
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    • v.24 no.4
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    • pp.1058-1063
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    • 2020
  • This paper proposes a 12-bit SAR A/D(Successive Approximation Register Analog-to-Digital) converter that operates at low power for bio-signal and sensor signal processing. The conventional SAR A/D converter utilized the reduction of the dynamic current, which resulted in reducing total power consumption. In order to solve the limitation of the sampling time due to charging/discharging of the capacitor for reducing dynamic current, the different sampling time on the C-DAC bit switch operation was applied to reduce the dynamic current. In addition, lowering the supply voltage of the digital block to 0.6V led to 70% reduction of the total power consumption of the proposed ADC. The proposed SAR A/D was implemented with CMOS 65nm process 1-poly 6-metal, operates with a supply voltage of 1.2V. The simulation results demonstrate that ENOB, DNL/INL, power consumption and FoM are 10.4 bits, ±0.5LSB./±1.2LSB, 31.2uW and 2.8fJ/step, respectively.

Dynamic Model of a Long-term Water Demand Using System Dynamics (시스템 다이나믹스를 이용한 도시 물수요 장기 예측의 동적 모델 연구)

  • Lee, Sangeun;Choi, Dongjin;Park, Heekyungh
    • Journal of Korean Society of Water and Wastewater
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    • v.21 no.1
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    • pp.75-82
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    • 2007
  • When one forecasts urban water demand in a long-term, multivariate model can give more benefits than per capita requirement model. However, the former has shortcomings in that statistically high explanatory power cannot be obtained well, and change in customer behavior cannot be considered. If the past water consumption effects the future water demand, dynamic model may describe real water consumption data better than static model, i.e. the existing multivariate model. On these grounds, this study built dynamic model using system dynamics. From a case study in Seoul and Busan city, dynamic model was expected to forecast water demand more descriptively and reliably.

Energy-Efficient Base Station Operation in Heterogeneous Cellular Networks

  • Nguyen, Hoang-Hiep;Hwang, Won-Joo
    • Journal of Korea Multimedia Society
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    • v.15 no.12
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    • pp.1456-1463
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    • 2012
  • In this paper, we study the ON/OFF control policy of base stations in two-tier heterogeneous cellular networks to minimize the total power consumption of the system. Using heterogeneous cellular networks is a potential approach of providing higher throughput and coverage compared to conventional networks with only macrocell deployment, but in fact heterogeneous cellular networks often operates regardless of total power consumption, which is a very important issue of modern cellular networks. We propose a policy that controls the activation/deactivation of base stations in heterogeneous cellular networks to minimize total power consumption. Under this policy, the total power consumed can be significantly reduced when the traffic is low while the QoS requirement is satisfied.

On Effective Slack Reclamation in Task Scheduling for Energy Reduction

  • Lee, Young-Choon;Zomaya, Albert Y.
    • Journal of Information Processing Systems
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    • v.5 no.4
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    • pp.175-186
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    • 2009
  • Power consumed by modern computer systems, particularly servers in data centers has almost reached an unacceptable level. However, their energy consumption is often not justifiable when their utilization is considered; that is, they tend to consume more energy than needed for their computing related jobs. Task scheduling in distributed computing systems (DCSs) can play a crucial role in increasing utilization; this will lead to the reduction in energy consumption. In this paper, we address the problem of scheduling precedence-constrained parallel applications in DCSs, and present two energy- conscious scheduling algorithms. Our scheduling algorithms adopt dynamic voltage and frequency scaling (DVFS) to minimize energy consumption. DVFS, as an efficient power management technology, has been increasingly integrated into many recent commodity processors. DVFS enables these processors to operate with different voltage supply levels at the expense of sacrificing clock frequencies. In the context of scheduling, this multiple voltage facility implies that there is a trade-off between the quality of schedules and energy consumption. Our algorithms effectively balance these two performance goals using a novel objective function and its variant, which take into account both goals; this claim is verified by the results obtained from our extensive comparative evaluation study.

Dynamic Voltage Scaling (DVS) Considering the DC-DC Converter in Portable Embedded Systems (휴대용 내장형 시스템에서 DC-DC 변환기를 고려한 동적 전압 조절 (DVS) 기법)

  • Choi, Yong-Seok;Chang, Nae-Hyuck;Kim, Tae-Whan
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.2
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    • pp.95-103
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    • 2007
  • Dynamic voltage scaling (DVS) is a well-known and effective power management technique. While there has been research on slack distribution, voltage allocation and other aspects of DVS, its effects on non-voltage-scalable devices has hardly been considered. A DC-DC converter plays an important role in voltage generation and regulation in most embedded systems, and is an essential component in DVS-enabled systems that scale supply voltage dynamically. We introduce a power consumption model of DC-DC converters and analyze the energy consumption of the system including the DC-DC converter. We propose an energy-optimal off-line DVS scheduling algorithm for systems with DC-DC converters, and show experimentally that our algorithm outperforms existing DVS algorithms in terms of energy consumption.

Analysis of system dynamic influences in robotic actuators with variable stiffness

  • Beckerle, Philipp;Wojtusch, Janis;Rinderknecht, Stephan;von Stryk, Oskar
    • Smart Structures and Systems
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    • v.13 no.4
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    • pp.711-730
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    • 2014
  • In this paper the system dynamic influences in actuators with variable stiffness as contemporary used in robotics for safety and efficiency reasons are investigated. Therefore, different configurations of serial and parallel elasticities are modeled by dynamic equations and linearized transfer functions. The latter ones are used to identify the characteristic behavior of the different systems and to study the effect of the different elasticities. As such actuation concepts are often used to reach energy-efficient operation, a power consumption analysis of the configurations is performed. From the comparison of this with the system dynamics, strategies to select and control stiffness are derived. Those are based on matching the natural frequencies or antiresonance modes of the actuation system to the frequency of the trajectory. Results show that exclusive serial and parallel elasticity can minimize power consumption when tuning the system to the natural frequencies. Antiresonance modes are an additional possibility for stiffness control in the series elastic setup. Configurations combining both types of elasticities do not provide further advantages regarding power reduction but an input parallel elasticity might enable for more versatile stiffness selection. Yet, design and control effort increase in such solutions. Topologies incorporating output parallel elasticity showed not to be beneficial in the chosen example but might do so in specific applications.

Power-Aware Motion Estimation for Low-Power Multimedia Communication (저전력 멀티미디어 통신을 위한 전력 의식 움직임 추정 기법)

  • Lee, Seong-Soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.1C
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    • pp.149-156
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    • 2004
  • In this paper, novel power-aware motion estimation is proposed for low-power multimedia communication. In the video compression, motion estimation dominates the total power consumption, where better performance usually requires more power consumption. Among several motion estimation algorithms with different performance and power, the proposed motion estimation adaptively selects the optimal algorithm during run-time, considering the trade-off between performance and power. The proposed motion estimation can be easily applied to various motion estimation algorithms with negligible computation or hardware overhead. According to simulation results, the proposed motion estimation reduces the power consumption to 1/15.7~1/5.6 without performance degradation, when compared to the conventional algorithms.