• Title/Summary/Keyword: dvr

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A Study on the Improvement of Tearing Artifact for Windows-Based Visual Monitoring Systems (윈도우즈 기반 영상 감시 시스템에서의 Tearing 현상 개선)

  • 정연권;이동학;정선태
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.11C
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    • pp.1097-1105
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    • 2002
  • In display systems employing analog monitors, the tearing artifact such that an window screen is divided into two parts showing different scenes can occur when the change of scenes in the moving pictures is very fast, but the frame buffer's refresh rate does not match the monitor's scanning frequency. It is especially noticeable at high frame rate. DVR system is a recently popularized visual monitoring system. The tearing artifacts becomes more serious since the frame buffer's refresh rate is very high due to the requirement of multi channel display in the DVR. In this paper, we propose an improved display system for windows-based DVR systems which prevents the tearing artifacts without deterioration of display speed performance. The efficiency of the proposed display system is verified through experiments.

Three-Phase Line-Interactive Dynamic Voltage Restorer with a New Sag Detection Algorithm

  • Jeong, Jong-Kyou;Lee, Ji-Heon;Han, Byung-Moon
    • Journal of Power Electronics
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    • v.10 no.2
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    • pp.203-209
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    • 2010
  • This paper describes the development of a three-phase line-interactive DVR with a new sag detection algorithm. The developed detection algorithm has a hybrid structure composed of an instantaneous detector and RMS-variation detectors. The source voltage passes through the sliding-window DFT and RMS calculator, and the instantaneous sag detector. If an instantaneous sag is detected, the RMS variation detector-1 is selected to calculate the RMS variation. The RMS variation detector-2 is selected when the instantaneous sag occurs under the operation of the RMS variation detector-1. The feasibility of the proposed algorithm is verified through computer simulations and experimental work with a prototype of a line-interactive DVR with a 3kVA rating. The line-interactive DVR with the proposed algorithm can compensate for an input voltage sag or an interruption within a 2ms delay. The developed DVR can effectively compensate for a voltage sag or interruption in sensitive loads, such as computers, communications equipment, and automation equipment.

Evaluation of Regional Flowering Phenological Models in Niitaka Pear by Temperature Patterns (경과기온 양상에 따른 신고 배의 지역별 개화예측모델 평가)

  • Kim, Jin-Hee;Yun, Eun-jeong;Kim, Dae-jun;Kang, DaeGyoon;Seo, Bo Hun;Shim, Kyo-Moon
    • Korean Journal of Agricultural and Forest Meteorology
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    • v.22 no.4
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    • pp.268-278
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    • 2020
  • Flowering time has been put forward due to the recent abnormally warm winter, which often caused damages of flower buds by late frosts persistently. In the present study, cumulative chill unit and cumulative heat unit of Niitaka pear, which are required for releasing the endogenous dormancy and for flowering after breaking dormancy, respectively, were compared between flowering time prediction models used in South K orea. Observation weather data were collected at eight locations for the recent three years from 2018-2020. The dates of full bloom were also collected to determine the confidence level of models including DVR, mDVR and CD models. It was found that mDVR model tended to have smaller values (8.4%) of the coefficient of variation (cv) of chill units than any other models. The CD model tended to have a low value of cv (17.5%) for calculation of heat unit required to reach flowering after breaking dormancy. The mDVR model had the most accurate prediction of full bloom during the study period compared with the other models. The DVR model usually had poor skills in prediction of full bloom dates. In particular, the error of the DVR model was large especially in southern coastal areas (e.g., Ulju and Sacheon) where the temperature was warm. Our results indicated that the mDVR model had relatively consistent accuracy in prediction of full bloom dates over region and years of interest. When observation data for full bloom date are compiled for an extended period, the full bloom date can be predicted with greater accuracy improving the mDVR model further.

A Study on the Development and Market Trends of Digital Video Recorder (DVR 시장 동향 및 국내외 개발 현황)

  • Chun, H.S.
    • Electronics and Telecommunications Trends
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    • v.24 no.3
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    • pp.128-138
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    • 2009
  • DVR은 아날로그 감시카메라로 입력된 영상정보를 영상 캡처보드를 통해 디지털 영상 정보로 변환, 압축하여 하드디스크에 저장하는 차세대 CCTV 영상감시 및 저장시스템이다. 본 고에서는 미래 유망산업으로 발돋움하고 있는 영상정보산업의 중추를 이루고 있는 DVR의 특성, 시장동향, 국내외 개발현황을 살펴보고 결론에서 정책적 시사점을 도출하고자 한다.

Synchronous PI control scheme for DVR against a voltage sag in the power system (전력 계통내에서 순간 전압 강하에 빠른 응답 특성을 가진 DVR의 제어)

  • Kim M.B.;Lee S.H.;Moon G.W.;Youn M.J.
    • Proceedings of the KIPE Conference
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    • 2003.07b
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    • pp.554-559
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    • 2003
  • A new control strategy for dynamic voltage restorer (DVR) is proposed. It is based on synchronous PI control strategy which features fast response. Therefore, the proposed control strategy takes faster action against a voltage sag. Experimental results, executed by DSP, are shown to validate the proposed control strategy.

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A Syudy On DVR Control for Unbalanced Voltage Compensation (불평형 전압 보상을 위한 DVR 제어에 관한 연구)

  • Jung, Hong-Ju;Chung, Joon-Mo;Song, Jong-Whan
    • Proceedings of the KIEE Conference
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    • 2001.04a
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    • pp.218-221
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    • 2001
  • This paper presents a new control scheme for a Dynamic Voltage Restorer(DVR) system consisting of series voltage source PWM converters. The control system is designed using differential controllers and digital filters to transfer the faulted ac source voltage to a d-q model and to separate the positive and negative sequence component for individual compensation. The performance of the presented controller and scheme are confirmed through simulation and actual experiment.

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Implementation of 4-channel Embedded DVR Based on Linux (리눅스 기반 4채널 임베디드 DVR 구현)

  • 이흥규;정갑천;최종현;박성모
    • Proceedings of the IEEK Conference
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    • 2003.07c
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    • pp.2677-2680
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    • 2003
  • This paper describes the implementation of a 4 channel embedded DVR system. It receives analog video from CCD cameras and converts to 640${\times}$480 CCIR-656 digital video by 30 frames/sec. These digital images are compressed to the wevelet transformed image using hardware codec which is capable of 350:1 real-time compression and decompression. The DVR is working on linux and it implemented on an embedded system which is based on StrongARM processor. For the interface between processor system module and image processing module, GPIO and memory control module are used, device drivers are developed. Linux kernel source is customized. This paper provides techniques of embedded system development and embedded linux porting.

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Implementation of MPEG-4 Encoder for PC-Based Real-time Multi-channel DVR Systems (PC 기반의 실시간 다채널 DVR 시스템을 위한 MPEG-4 인코더 구현)

  • Jang, Kyung-Hyun;Park, Ki-Tae;Kim, Chan-Gyu;Hong, In-Hwa;Kim, Jin-Kook;Yeo, Hun-Gu;Moon, Young-Shik
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.565-568
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    • 2005
  • Even though there has been a great deal of research and development for the compression techniques such as H.263, MPEG-1, and MPEG-2 in DVR systems, an efficient scheme for storing, accessing, and managing the huge amount of video data from multi-channel cameras needs to be developed. In this paper, we describe an implementation of MPEG-4 encoder for PC-based real-time multi-channel DVR systems.

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A Study on DVR Control for Unbalanced Voltage Compensation

  • Jung Hong-Ju;Suh In-Young;Kim Byung-Seob;Kim Rae-Young;Choi See-Young
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.803-807
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    • 2001
  • This paper presents a new control scheme for a DVR (Dynamic Voltage Restorer) system consisting of series voltage source PWM converters. To control the negative sequence components of the source, it is necessary to detect the negative sequence components. Generally, a filtering process is used which has some undesirable effects. This paper suggests a new method for separating positive and negative sequences components. This control system is designed using differential controllers and digital filters. The positive and negative sequences are extracted and controlled individually. The performance of the presented controller and scheme are confirmed through simulation and actual experiment with a 2.5kVA prototype DVR system.

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LC Filter Design for Direct Voltage Restorers Considering Voltage Control Performance and PWM Inverter Size (PWM 인버터의 전압제어특성과 인버터 용량을 고려한 순시전압보상기(DVR)의 출력필터 설계방법)

  • Kim, Hyo-Sung;Kim, Jang-Hwan;Sul, Seung-Ki
    • Proceedings of the KIEE Conference
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    • 2004.04a
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    • pp.118-121
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    • 2004
  • The cutoff frequency of a LC output filter for Dynamic Voltage Restorers (DVR) limits the control bandwidth of a DVR system and the attenuation factor against the inverter switching ripples. For a selected cutoff frequency of a LC output filter, infinite number of L-C combinations is possible. Although different L-C combination has different filter characteristics, the filter design on L-C combination has been depended on field experiences without clear analysis. This paper proposes a design criterion and design examples for the L-C filter combination considering the control characteristics and the size of DVRs. An experimental DVR system based on the proposed LC output filter design methodology is built and tested.

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