• 제목/요약/키워드: duality.

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Imprecise DEA Efficiency Assessments : Characterizations and Methods

  • Park, Kyung-Sam
    • Management Science and Financial Engineering
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    • 제14권2호
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    • pp.67-87
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    • 2008
  • Data envelopment analysis (DEA) has proven to be a useful tool for assessing efficiency or productivity of organizations which is of vital practical importance in managerial decision making. While DEA assumes exact input and output data, the development of imprecise DEA (IDEA) broadens the scope of applications to efficiency evaluations involving imprecise information which implies various forms of ordinal and bounded data possibly or often occurring in practice. The primary purpose of this article is to characterize the variable efficiency in IDEA. Since DEA describes a pair of primal and dual models, also called envelopment and multiplier models, we can basically consider two IDEA models: One incorporates imprecise data into envelopment model and the other includes the same imprecise data in multiplier model. The issues of rising importance are thus the relationships between the two models and how to solve them. The groundwork we will make includes a duality study which makes it possible to characterize the efficiency solutions from the two models. This also relates to why we take into account the variable efficiency and its bounds in IDEA that some of the published IDEA studies have made. We also present computational aspects of the efficiency bounds and how to interpret the efficiency solutions.

Distributed Power and Rate Control for Cognitive Radio Networks

  • Wang, Wei;Wang, Wenbo;Zhu, Yajun;Peng, Tao
    • Journal of Communications and Networks
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    • 제11권2호
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    • pp.166-174
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    • 2009
  • In this paper, a distributed power and end-to-end rate control algorithm is proposed in the presence of licensed users. By Lagrangian duality theory, the optimal power and rate control solution is given for the unlicensed users while satisfying the interference temperature limits to licensed users. It is obtained that transmitting with either 0 or the maximum node power is the optimal scheme. The synchronous and asynchronous distributed algorithms are proposed to be implemented at the nodes and links. The convergence of the proposed algorithms are proved. Finally, further discussion on the utility-based fairness is provided for the proposed algorithms. Numerical results show that the proposed algorithm can limit the interference to licensed user under a predefined threshold.

Sum MSE Minimization for Downlink Multi-Relay Multi-User MIMO Network

  • Cho, Young-Min;Yang, Janghoon;Seo, Jeongwook;Kim, Dong Ku
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제8권8호
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    • pp.2722-2742
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    • 2014
  • We propose methods of linear transceiver design for two different power constraints, sum relay power constraint and per relay power constraint, which determine signal processing matrices such as base station (BS) transmitter, relay precoders and user receivers to minimize sum mean square error (SMSE) for multi-relay multi-user (MRMU) networks. However, since the formulated problem is non-convex one which is hard to be solved, we suboptimally solve the problems by defining convex subproblems with some fixed variables. We adopt iterative sequential designs of which each iteration stage corresponds to each subproblem. Karush-Kuhn-Tucker (KKT) theorem and SMSE duality are employed as specific methods to solve subproblems. The numerical results verify that the proposed methods provide comparable performance to that of a full relay cooperation bound (FRCB) method while outperforming the simple amplify-and-forward (SAF) and minimum mean square error (MMSE) relaying in terms of not only SMSE, but also the sum rate.

릴레이 회로의 확장된 마크흐름선도 변환 (The Relay Circuits Translation to EMFGs)

  • 여정모;백형구
    • 제어로봇시스템학회논문지
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    • 제9권11호
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    • pp.952-957
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    • 2003
  • We propose how to translate relay circuits to the EMFGs(Extended Mark Flow Graphs) formally and analyze the original one by using the mark flow of it. Firstly, the concepts of the output condition, the output-on condition and the output-off condition are introduced in the relay circuits. These can be used to find the structure and the operation of respective relay outputs but the sequential operations of them cannot be obtained from these. Secondly, a relay circuit is translated to the corresponding EMFG as the all output-on conditions and all output-off conditions of it are translated to EMFGs. For the adequate translation, the condition arc and the concepts of the generation transition and the degeneration transition are introduced, and the duality for the simplification of the result. Thirdly, we analyze the operation of the original circuit by analyzing the mark flow of the resulting EMFG. We can achieve easy and fast analysis based on the EMFG's operation algorithm. Finally, we apply these to the relay circuit for an electric furnace and analyze its operation with the mark flow of the resulting EMFG. The formal translation from relay circuits to EMFGs makes the analysis easy so that these results can be used to design, modelling, the fault detection and the maintenance.

Transceiver Design Using Local Channel State Information at Relays for A Multi-Relay Multi-User MIMO Network

  • Cho, Young-Min;Yang, Janghoon;Kim, Dong Ku
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제7권11호
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    • pp.2616-2635
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    • 2013
  • In this paper, we propose an iterative transceiver design in a multi-relay multi-user multiple-input multiple-output (MIMO) system. The design criterion is to minimize sum mean squared error (SMSE) under relay sum power constraint (RSPC) where only local channel state information (CSI)s are available at relays. Local CSI at a relay is defined as the CSI of the channel between BS and the relay in the $1^{st}$ hop link, and the CSI of the channel between the relay and all users in the $2^{nd}$ hop link. Exploiting BS transmitter structure which is concatenated with block diagonalization (BD) precoder, each relay's precoder can be determined using local CSI at the relay. The proposed scheme is based on sequential iteration of two stages; stage 1 determines BS transmitter and relay precoders jointly with SMSE duality, and stage 2 determines user receivers. We verify that the proposed scheme outperforms simple amplify-and-forward (SAF), minimum mean squared error (MMSE) relay, and an existing good scheme of [13] in terms of both SMSE and sum-rate performances.

STRONG CONVERGENCE OF COMPOSITE ITERATIVE METHODS FOR NONEXPANSIVE MAPPINGS

  • Jung, Jong-Soo
    • 대한수학회지
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    • 제46권6호
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    • pp.1151-1164
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    • 2009
  • Let E be a reflexive Banach space with a weakly sequentially continuous duality mapping, C be a nonempty closed convex subset of E, f : C $\rightarrow$C a contractive mapping (or a weakly contractive mapping), and T : C $\rightarrow$ C a nonexpansive mapping with the fixed point set F(T) ${\neq}{\emptyset}$. Let {$x_n$} be generated by a new composite iterative scheme: $y_n={\lambda}_nf(x_n)+(1-{\lambda}_n)Tx_n$, $x_{n+1}=(1-{\beta}_n)y_n+{\beta}_nTy_n$, ($n{\geq}0$). It is proved that {$x_n$} converges strongly to a point in F(T), which is a solution of certain variational inequality provided the sequence {$\lambda_n$} $\subset$ (0, 1) satisfies $lim_{n{\rightarrow}{\infty}}{\lambda}_n$ = 0 and $\sum_{n=0}^{\infty}{\lambda}_n={\infty}$, {$\beta_n$} $\subset$ [0, a) for some 0 < a < 1 and the sequence {$x_n$} is asymptotically regular.

<두 개의 사랑>에서의 쌍둥이 모티브와 거울 이미지 (Twin Motifs and Mirror Images in )

  • 서곡숙
    • 한국콘텐츠학회논문지
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    • 제20권9호
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    • pp.19-28
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    • 2020
  • <두 개의 사랑>(2017)을 중심으로 쌍둥이 모티브의 욕망, 죽음, 환상이 거울 이미지로 재현되는 방식에 대해서 고찰하고자 한다. 첫째, 쌍둥이 모티브의 욕망은 선/악과 규범/욕망의 이중성을 관능적 유혹의 거울로 표현한다. 둘째, 쌍둥이 모티브의 죽음은 죽음의 전이를 처벌의 거울로 표현한다. 셋째, 쌍둥이 모티브의 환상은 정신적 방어를 파편화된 거울로 표현한다. 이렇듯 <두 개의 사랑>에서 쌍둥이 모티브는 욕망, 죽음, 환상이라는 세 가지 키워드를 중심으로 이중성, 처벌, 분열이라는 세 가지 거울 이미지로 효과적으로 표현하고 있다.

Hairpin Line 여파기의 간단화된 등가회로 (Simplified Equivalent Circuit of Hairpin Line Filters)

  • 곽우영;박진우
    • 한국통신학회논문지
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    • 제24권9A호
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    • pp.1434-1441
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    • 1999
  • 본 논문에서는 Hairpin Line 여파기의 정확한 해석 및 설계를 위한 등가회로를 제시하였으며 제시된 등가회로의 유효성을 컴퓨터 시뮬레이션과 설계를 통해 입증하였다. Hairpin Line 여파기에 대한 설계식은 다양하게 제시되었으나, 인접하지 않는 소자간의 상호 연결성을 포함한 실제적으로 간단화된 등가회로는 아직 명시되고 있지 못하다. 본 논문에서는 회로 duality을 이용하여 Hairpin Line 여파기 회로의 모든 개방단자를 단락단자로 변환하고, 변환된 회로를 그래프 모델로 표시하였다. 또한 각 단자에서의 경계조건으로부터 보다 간략화된 회로모델을 구하고 역 dual구조로 변환하여 Hairpin Line 여파기에 대한 간단화된 등가회로를 유도하였다.

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