• Journal of the Korean Professional Engineers Association
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• v.34 no.4
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• pp.36-40
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• 2001

Multimedia service via satellite Is supported voice, data, Image and video signals. The representation case model of satellite multimedia are satellite TV. satellite Internet. In the early 1990s, satellite communication and broad casting services successfully expanded form C/Ku band to Ka band. The benefits of operation at Ka-band are greater bandwidth available to accommodate the increased demand for high-speed Information exchange. By the early years of the 21s1 century, millions of households worldwide with dual Ku / Ka-band dishes Satellite multimedia systems receive hundreds of TV channels, originating from around the world, and delivering entertainment, information and education. Many Ku-band satellites have been ordered, but few Ka-band systems are moving into production. So Ka-band systems are characterized that low-cost access to low and high peed, two-way voice, data, and video communications.

• Proceedings of the Korea Multimedia Society Conference
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• 2012.05a
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• pp.43-45
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• 2012

This paper is based on embedding the biometrics techniques on GPU for better computational efficiency and fast matching process using the parallel nature of the GPU processors to compare thousands of images for fingerprint recognition in a fraction of a second. In this paper we worked on GPU (INVIDIA GeForce GTX 260 with compute capability 1.3 and dual core-2-dou processor) for fingerprint matching and found that the efficiency is better than the results with related work already done on CMOS, CPU, ARM9, MATLAB Neural Networks etc which shows the better performance of our system in terms of computational time. The features matching process proposed for fingerprint recognition and the verification procedure is done on 5,000 images which are available online in the databases FVC2000, 2002, 2004 [1].

• International Journal of High-Rise Buildings
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• v.5 no.3
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• pp.213-220
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• 2016

The "China Zun" tower in Beijing will rise to 528 meters in height and will be the tallest building in Beijing once built. Inspired by an ancient Chinese vessel, the "Zun", the plan dimensions reduce gradually from the bottom of the tower to the waist and then expand again as it rises to form an aesthetically beautiful and unique geometry. To satisfy the structural requirement for seismic and wind resistance, the structure is a dual system composed of a perimeter mega structure made of composite mega columns, mega braces, and belt trusses, and a reinforced-concrete core with steel plate-embedded walls. Advanced parametric design technology is applied to find the most efficient outer-perimeter structure system. The seismic design basically follows a mixed empirical and performance-based methodology that was verified by a shaking table test and other specimen lab tests. The tower is now half-way through its construction.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.927-930
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• 2003

In this paper, a design of processor IP for TCP/IP protocol stack is described. The processor consists of input and output buffer memory with dual bank structure, 32-bit RISC microprocessor core, DMA unit with on-the-fly checksum capability. To handle the various modes of TCP/IP protocol, hardware and software co-design approach is used rather than the conventional state machine based design. To eliminate delay time due to the data transfer and checksum operation, DAM module which can execute the checksum operation on-the-fly along with data transfer operation is adopted. By programming the on-chip code ROM of RISC processor differently. the designed stack processor can support the packet format conversion operations required in the various TCP/IP protocols.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.859-862
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• 2003

This paper proposes an emulation environment for SoC designs using small number of large gate-count FPGA's and a PC system. To overcome the pin limitation problem in partitioning the design when the design size overwhelms the FPGA gate count, we use bus splitter modules that replicate on-chip bus signals in one FPGA to arbitrary number of other FPGA's with minimal pin count. The proposed scheme is applied to the emulation of 2 million gate multimedia processing chip using two Xilinx Viretex-2 6000 FPGA devices in 6.6MHz operating frequency. An ARM core, memories, camera and LCD display are modeled in software using dual 2GHz Pentium-III processors. This scheme can be utilized for more than 2 FPGA's in the same ways as two FPGA case without losing emulation speed.

• BMB Reports
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• v.50 no.9
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• pp.437-444
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• 2017

Different types of eukaryotic cells may adopt seemingly distinct modes of directional cell migration. However, several core aspects are regarded common whether the movement is either ameoboidal or mesenchymal. The region of cells facing the attractive signal is often termed leading edge where lamellipodial structures dominates and the other end of the cell called rear end is often mediating cytoskeletal F-actin contraction involving Myosin-II. Dynamic remodeling of cell-to-matrix adhesion involving integrin is also evident in many types of migrating cells. All these three aspects of cell migration are significantly affected by signaling networks of TorC2, TorC1, and PP2A/B56. Here we review the current views of the mechanistic understanding of these regulatory signaling networks and how these networks affect eukaryotic cell migration.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.567-570
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• 2002

The LVDS (Low Voltage Differential Signaling) I/O cells, fully compatible with ANSI TIA/ EIA-644 LVDS standard, are designed using a 0.35${\mu}m$ standard CMOS technology. With a single 3V supply, the core cells operate at 1.34Gbps and power consumption of the output driver and the input receiver is 10. 5mW and 4.2mW, respectively. In the output driver, we employ the DCMFB (Dynamic Common-Mode FeedBack) circuit which can control the DC offset voltage of differential output signals. The SPICE simulation result of the proposed output driver shows that the variation of the DC offset voltage is 15.6% within a permissible range. In the input receiver, the proposed dual input stage with a positive feedback latch covers rail-to-rail input common-mode range and enables a high-speed, low-power operation. 5-channels of the proposed LVDS I/O pair can handle display data up to 8-bit gray scale and UXGA resolution.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2012.07a
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• pp.269-270
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• 2012

Features which exhibit scale and rotation invariance, such as SIFT, are notorious for expensive computation time, and often overlooked for real-time tracking scenarios. This paper proposes a descriptorless matching algorithm based on motion vectors between consecutive frames to find the geometrically closest candidate to each tracked reference feature in the database. Descriptor-less matching forgoes expensive SIFT descriptor extraction without loss of matching accuracy and exhibits dramatic speed-up compared to traditional, naive matching based trackers. Descriptor-less SIFT tracking runs in real-time on an Intel dual core machine at an average of 24 frames per second.

• Language and Information
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• v.5 no.1
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• pp.55-71
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• 2001

One of the controversial issues in English locative inversion (LI) construction( e. g. Under the tree sat a woman) has been the functional status of preverbal PP and postverbal NP, i.e. whether they are a subject, a complement, or filer (topic) Based on the distributional parallelisms between the PP and NP on the one hand and an ordinary subject and filler on the other this paper proposes that the PP has a dual function as a subject and filler, while the NP also has some subject properties that the PP does not have These mixed functional properties are analyzed in the theory of HPSG expecially with the versions recently developed by Sag(1997) Manning and Sag(1999) and Ginzburg and Sag(to appear). This analysis claims that the LI construction needs to satisfy two general, independent constraints head-subject- phrase and head-filler-phrase. This position suggests that the English LI construction is an instance of the peripheral phenomena whose construction specific constraint is inherited from more general core constraints. (Dongseo University)

• International Journal of High-Rise Buildings
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• v.6 no.1
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• pp.91-99
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• 2017

Special consideration should be given to differential column shortening during the design and construction of a tall building to mitigate the adverse effects caused by such shortening. The effects of the outrigger - which is conventionally used to increase the lateral stiffness of a tall building - on the differential shortening are investigated in this study. Three analysis models, a constant-section, constant-stress, and general model, are prepared, and the differential shortenings of these models with and without the outrigger are compared. The effects of connection time, sectional area, and location of the outrigger on the differential shortening are studied. The sectional area of the outrigger shows a non-linear relation in reducing the maximum differential shortening. The optimum locations of the single and dual outriggers are investigated by an exhaustive search method, and it is confirmed that a global optimum location exists. This study shows that the outrigger can be utilized to reduce the differential shortening between the interior core wall and the perimeter columns as well as to reduce the lateral displacements due to wind or earthquake loads.