• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.415-418
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• 2005

DSP chip parameters of a digital hearing aid (HA) should be optimally selected or fitted for hearing impaired persons. The more precise parameter fitting guarantees the better compensation of the hearing loss (HL). Digital HAs adopt DSP chips for more precise fitting of various HL threshold curve patterns. A specific DSP chip such as Gennum GB3211 was designed and manufactured in order to match up to about 4.7 billion different possible HL cases with combination of 7 limited parameters. This paper deals with a digital HA fitting program which is developed for optimal fitting of GB3211 DSP chip parameters. The fitting program has completed feature from audiogram input to DSP chip interface. The compensation effects of the microphone and the receiver are also included. The paper shows some application examples.

• Proceedings of the Acoustical Society of Korea Conference
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• spring
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• pp.51-54
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• 2000

This paper describes the fixed-point DSP implementation of a CELP(code-excited linear prediction)-based speech coder. The effective realization methodologies to maximize the utilization of the DSP's architectural features, specifically Parallel movement and pipelining are also presented together with the implementation results targeted for the ITU-T standard G.723.1 using Motorola DSP56309. The operation of the implemented speech coder is verified using the test vectors offered by the standard as well as using the peripheral interface circuits designed for the coder's real-time operation.

• Proceedings of the IEEK Conference
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• 2001.09a
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• pp.481-484
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• 2001

본 논문에서는 MPEG-2 AAC 디코더의 DSP구현에 관한 연구결과로서 IS0/1EC 13818-7 표준에 의거 구현된 MPEC-2 AAC 디코더의 각 세부 기능블럭들의 구성 및 동작원리에 대하여 요약 기술하고. DSP연산에 최적화된 연산구조의 연구를 바탕으로 16bit 고정소수점 연산구조를 가지는 DSP상에서 구현된 MPEG-2 AAC 디로더의 시스템의 하드웨어 및 소프트웨어 구성에 관하여 간략한 기술하였다. 구성된 디코더의 성능평가를 통하여 MPEC-2 AAC 비트스트림을 디코딩하기 위하여 필요로 하는 연산량 및 소요 메모리의 양을 측정하고, 디코더 성능의 중요 척도인 음질평가를 수행하였다. 수행방법으로서 conformance test에 의거하여 PSNR을 측정함으로써 객관적인 성능 지표의 제시와 함께, 주관적인 음질 평가도 병행하여 수행하였다.

• Speech Sciences
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• v.11 no.3
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• pp.143-156
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• 2004

In this paper, we implemented a vocabulary-independent speech recognizer using the TMS320VC33 DSP. For this implementation, we had developed very small-sized recognition engine based on diphone sub-word unit, which is especially suited for embedded applications where the system resources are severely limited. The recognition accuracy of the developed recognizer with 1 mixture per state and 4 states per diphone is 94.5% when tested on frequently-used 2000 words set. The design of the hardware was focused on minimal use of parts, which results in reduced material cost. The finally developed hardware only includes a DSP, 512 Kword flash ROM and a voice codec. In porting the recognition engine to the DSP, we introduced several methods of using data and program memory efficiently and developed the versatile software protocol for host interface. Finally, we also made an evaluation board for testing the developed hardware recognition module.

• Proceedings of the Acoustical Society of Korea Conference
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• autumn
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• pp.93-96
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• 2004

본 논문은 TMS320C5501 16bit DSP를 적용한 실시간 화자독립 연속 숫자인식기의 구현에 관해 서술한다. 하드웨어 모듈의 구성은 TMS320C5501 300MHz DSP, 코덱으로는 TLV320AIC1103, SDRAM, 외부장치와의 인터페이스를 위한 HPI, Uart, MIC, SPK Out 단자로 구성되었다. 음성인식 알고리즘은 HM-Net 방식을 사용하였고 고정소수점 연산처리 방식으로 C를 이용한 최적화 작업을 수행하였으며 스트리밍 방식의 인식 방법으로 실시간 처리가 가능하도록 구현하였다. 숫자 인식에 사용한 모델은 41음소에 기반한 트라이폰을 학습하였으며, 특징 파라미터로는 LPCMEL 20차를 사용하였다. 임베디드 시스템의 실시간 음성인식 시스템 구성에 중점을 두었으며 PC상에서의 성능과 비교해 볼때 본 DSP 상에서 500단어, 50문장의 인식을 평균 1.5초 전후로 인식하도록 하였으며 간단한 연결 단어 인식을 수행하는데 무리 없음을 보여준다. 특별히 한국어 연속숫자 부분에 중점을 두었고, 본 연구에서 구현된 연속 음성인식 시스템에 사용된 숫자 인식에서 음절 바이폰 모델에 대하여 $92.92\%$의 인식율을 얻을 수 있었다.

• Journal of the Korean Society for Precision Engineering
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• v.16 no.7
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• pp.32-39
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• 1999

Digital signal processor (DSP) is used to obtain the peak value and the time difference of ultrasonic signals, to make digital filter, and to derive mathematical transformation from analog circuit. In this study, C-scan system and control program have been developed to high speed data acquisition. This system consists of signal processing parts (DSP, oscilloscope, pulser/receiver, digitizer), scanner, and control program. The developed system has been applied to a practical ultrasonic testing in overlay weld, and demonstrated high speed with precision

• Journal of the Korean Society of Industry Convergence
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• v.3 no.1
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• pp.9-15
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• 2000

This paper presents a implementation of digital motion control system for induction motor vector drives using the 16bit DSP TMS320F240. The DSP controller enable enhanced real time algorithm and cost-effective design of intelligent controllers for motors which can be yield enhanced operation, fewer system components, lower system cost, increased efficiency and high performance. The system presented are speed and current sensing, sine look-up table and generated SVPWM by fully integrated control software. The developed system in a implementation are shown a good speed response and motion control characteristic results, and high performance features in general purposed 2.2[kW] machine. The system can be adapted variform motor drive system.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.3
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• pp.259-265
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• 2012

This paper introduces a method for design and implementation of a current controller for boost converter operating in continuous conduction mode (CCM) using a digital signal processor (DSP). A Proportional-Integral (PI) type current controller outputs an average voltage command for inductor, used in the input side of the boost converter, and the duty-ratio of PWM (pulse width modulation) signal for switching device is directly calculated from the average voltage command. The gains of the PI current controller are selected such that the current response characteristics are the same as those of a first-order low-pass filter. The proposed current control scheme is implemented using a DSP based on fixed-point math operations and an experimental study has been performed to validate the proposed method.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.52 no.12
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• pp.608-615
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• 2003

This paper describes an implementation of a DSP (Digital Signal Processor) controlled random carrier frequency modulation for the PWM inverter for acoustic noise reduction of induction motors. Real-time generation of the random variable and RPWM(Random PWM) along with the speed control was achieved by DSP TMS320C31. The experimental results show that the voltage and current harmonics are spread to a wide band area and the power spectrum of the acoustic switching noise was spread to create a more appealing, less annoying sound. Also, the speed response of the implemented method and the conventional method is nearly similar to each other from the viewpoint of the v/f constant control.

• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.729-732
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• 2001

Digital signal processors(DSP) are widely used in modern power conversion devices, ac motor drives. However, generating pulse-width modulation(PWM) gating signals requires so high sampling rates that most computation resources of the DSP must be devoted to generating them. This paper presents an ASIC realization of 2 channel space-vector PWM(SVPWM). The developed DSP(ECLDSP) board can transmit gating signals to 2 converter/inverter and control them. ECLDSP board is used for control the various kinds of power-quality improvement systems.