Implementation of the ACELP/MPMLQ-Based Dual-Rate Voice Coder Using DSP

ACELP/MP-MLQ에 기초한 dual-rate 음성 코더의 DSP 구현

  • Lee Jae-Sik (School of Electronics and Electrical Engineering, Chung-Ang University) ;
  • Son Yong-Ki (School of Electronics and Electrical Engineering, Chung-Ang University) ;
  • Jeon Il (School of Electronics and Electrical Engineering, Chung-Ang University) ;
  • Chang Tae-Gyu (School of Electronics and Electrical Engineering, Chung-Ang University) ;
  • Min Byoung-Ki (Electronics and Telecommunications Research Institute)
  • 이재식 (중앙대학교 전자전기공학부) ;
  • 손용기 (중앙대학교 전자전기공학부) ;
  • 전일 (중앙대학교 전자전기공학부) ;
  • 장태규 (중앙대학교 전자전기공학부) ;
  • 민병기 (한국전자통신연구원)
  • Published : 2000.07.07

Abstract

This paper describes the fixed-point DSP implementation of a CELP(code-excited linear prediction)-based speech coder. The effective realization methodologies to maximize the utilization of the DSP's architectural features, specifically Parallel movement and pipelining are also presented together with the implementation results targeted for the ITU-T standard G.723.1 using Motorola DSP56309. The operation of the implemented speech coder is verified using the test vectors offered by the standard as well as using the peripheral interface circuits designed for the coder's real-time operation.

Keywords