• Title/Summary/Keyword: drain resistance

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Impacts of Process and Design Parameters on the Electrical Characteristics of High-Voltage DMOSFETs (공정 및 설계 변수가 고전압 LDMOSFET의 전기적 특성에 미치는 영향)

  • 박훈수;이영기
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.9
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    • pp.911-915
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    • 2004
  • In this study, the electrical characteristics of high-voltage LDMOSFET fabricated by the existing CMOS technology were investigated depending on its process and design parameter. In order to verify the experimental data, two-dimensional device simulation was carried out simultaneously. The off- state breakdown voltages of n-channel LDMOSFETs were increased nearly in proportional to the drift region length. For the case of decreasing n-well ion implant doses from $1.0\times{10}^{13}/cm^2$ to $1.0\times{10}^{12}/cm^2$, the off-state breakdown voltage was increased approximately two times. The on-resistance was also increased about 76 %. From 2-D simulation, the increase in the breakdown voltage was attributed to a reduction in the maximum electric field of LDMOS imolanted with low dose as well as to a shift toward n+ drain region. Moreover, the on- and off-state breakdown voltages were also linearly increased with increasing the channel to n-tub spacing due to the reduction of impact ionization at the drift region. The experimental and design data of these high-voltage LDMOS devices can widely applied to design smart power ICs with low-voltage CMOS control and high-voltage driving circuits on the same chip.

Analysis of the Fixed Frequency LCL-type Converter at Continuous Current Mode Including Parasitic Losses (연속전류모드에서 기생손실들을 고려한 고정주파수 LCL형 컨버터 해석)

  • Park, Sangeun;Cha, Hanju
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.5
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    • pp.785-793
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    • 2016
  • This paper analyzes an LCL-type isolated dc-dc converter operating for constant output voltage in the continuous conduction mode(CCM) with resistances of parasitic losses-static drain-source on resistance of power switch, ESR of resonant network(L-C-L)-using a high loaded quality factor Q assumptions and fourier series techniques. Simple analytical expressions for performance characteristics are derived under steady-state conditions for designing and understanding the behavior of the proposed converter. The voltage-driven rectifier is analyzed, taking into account the diode threshold voltage and the diode forward resistance. Experimental results measured for a proposed converter at low input voltage and various load resistances show agreement to the theoretical performance predicted by the analysis within maximum 4% error. Especially in the case of low output voltages and large loads, It is been observed that introduction of both rectifier and the parasitic components of converter had considerable effect on the performance.

Dependence on Dopant of Ni-silicide for Nano CMOS Device (Nano CMOS소자를 위한 Ni-silicide의 Dopant 의존성 분석)

  • 배미숙;지희환;이헌진;오순영;윤장근;황빈봉;왕진석;이희덕
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.11
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    • pp.1-8
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    • 2003
  • In this paper, the dependence of silicide properties such as sheet resistance and cross-sectional profile on the dopants for source/drain and gate has been characterized. There was little difference of sheet resistance among the dopants such as As, P, BF$_2$ and B$_{11}$ just a(ter formation of NiSi using RTP (Rapid Thermal Process). However, the silicide properties showed strong dependence on the dopants when thermal treatment was applied after silicidation. BF$_2$ implanted silicon showed the most stable property, while As implanted one showed the worst. The main reason of the excellent property of BF$_2$ sample is believed to be tile retardation of hi diffusion by the flourine. Therefore, retardation of Ni diffusion is highly desirable for high performance Ni-silicide technology.y.

A Study on Evaluating the Applicability of Trapezoidal-shaped Grooves to Airport Runways (사다리꼴 형상 그루빙의 공항 활주로 적용성 평가 연구)

  • Cho, Nam-Hyun;Kim, Dong-Chul;Phi, Seung-Woo;Shin, Joong-Ha
    • Journal of the Korean Society for Aviation and Aeronautics
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    • v.29 no.4
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    • pp.78-87
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    • 2021
  • This study is to evaluate the applicability and performance of trapezoidal-shaped grooves on domestic airport runways. For this, the constructability, drainage performance, and friction resistance characteristics of trapezoidal-shaped grooves compared to square-shaped grooves were evaluated through test construction on pavement at Incheon Airport. As a result of the test construction, the trapezoidal-shaped grooves satisfies the required geometry standards and tolerance, and secured a macrotexture that was 25% improved compared to the square-shaped grooves. It was confirmed that trapezoid-shaped grooves secured drainage performance of more than 7-9%, and surface friction performance improved compared to existing grooves when the surface of the pavement was wet as the test speed increased in the dry state. In addition, after trapezoidal-shaped grooves was installed on the RWY 16R/34L of Incheon Airport, the friction coefficient was 0.84, which satisfies the design level of the new runway surface of 0.82 at the test speed.

Sensing Properties of Ga-doped ZnO Nanowire Gas Sensor

  • Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.2
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    • pp.78-81
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    • 2015
  • Pure ZnO and ZnO nanowires doped with 3 wt.% Ga (‘3GZO’) were grown by pulsed laser deposition in a furnace system. The doping of Ga in ZnO nanowires was analyzed by observing the optical and chemical properties of the doped nanowires. The diameter and length of nanowires were under 200 nm and several ${\mu}m$, respectively. Changes of significant resistance were observed and the sensitivities of ZnO and 3GZO nanowires were compared. The sensitivities of ZnO and 3GZO nanowire sensors measured at 300℃ for 1 ppm of ethanol gas were 97% and 48%, respectively.

Seismic Response of Exterior RC Column-to-Steel Beam Connections (II. Strength and Deformation) (콘크리트 기둥-강재 보 외부 접합부의 내진성능(II 강도 및 변형))

  • 조순호
    • Proceedings of the Earthquake Engineering Society of Korea Conference
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    • 2000.04a
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    • pp.283-289
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    • 2000
  • The panel shear and bearing strengths determining the seismic resistance of reinforced concrete column-to-steel beam connections are predicted by various methods for four previously tested exterior beam-column joints. The analytical approach to model the joint deformation is also examined. Several analyses incorporating the deformations of panel shear and bearing in the joint are demonstrated using a analyses incorporating the deformations of panel shear and bearing in the joint are demonstrated using a fairly simple connection model in the commercial packages such as Drain2dx and IDARC. The strength prediction results indicated that the ASCE method with the modifcation of the comprssion strut contribution is th most accurate. It is also considered that the analytical model presented including the joint deformation can be used for the overall analysis

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PDSS Analysis on Partially Penetrated Band Drains in Soft Clay Ground (밴드드레인이 부분관입된 연약점토지반을 위한 PDSS 해석)

  • 정성교;은성민;백승훈;이대명
    • Proceedings of the Korean Geotechical Society Conference
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    • 1999.03a
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    • pp.365-372
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    • 1999
  • The plane deformation and spatial seepage(PDSS) analysis was developed to consider 3D flow of excess pore water as well as plane deformation of ground. Here is newly developed an equivalent model for PDSS analysis, which was the purpose to reduce number of finite elements and to take the effects of smear and well resistance into consideration. As the result of PDSS analysis with applying the new model, it is showed that the settlement-tin e relationship by PDSS agrees well with those of Plane strain(PS) and axisymmetric analyses, irrespective of existence of untreated layer. And the excess pore pressure distribution by PDSS is relatively agreed with that of axisymmetric analysis, not with that of PS.

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A Study on the High Temperature Characteristics of 100V-Class LDMOSFET under various Drift Region Length (고온 동작 환경에서 드리프트 영역 길이 변화에 따른 100V급 LDMOSFET의 전기적 특성에 관한 연구)

  • Choi, Chul;Kim, Do-Hyung;Koo, Yong-Seo;An, Chul
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.278-281
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    • 2000
  • In this study, the electrical characteristics of 100V -Class LDMOSFET for high temperature applications such as electronic control systems of automobiles and motor driver were investigated. Measurement data are taken over wide range of temperature(300K-500K) and various drift region length(6.6$\mu\textrm{m}$-12.6$\mu\textrm{m}$). In high temperature condition(>450K), drain current decreased over 50%, and specific on-resistance increased about twice in comparison with room temperature. Moreover the ratio R$\sub$on//BV, a figure of merit of the device, increased with increasing temperature.

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Prediction of the transient response of the IGBT using the Spice parameter (Spice parameter를 이용한 IGBT의 과도응답 예측)

  • 이효정;홍신남
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.815-818
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    • 1998
  • The Insulated Gate Bipolar Transistor has the characteristics of MOSFET and BJT. The characteristics of proposed device exhibit high speed switching, the voltage controlled property, and the low ON resistance. This hybrid device has been used and developed continuously in the power electronic engineering field. We can simulate many IGBT circuits, such as the motor drive circuit, the switching circuits etc, with PSpice. However, some problems in PSpice is that the IGBT is old-fashioned and is very difficult to get it. In this paper, the IGBT in PSpice is considered as the basic structure. We changed the valuse of base width, gate-drain overlaping area, device area, and doping concentration, then calculated MOS transconductance, ambipolar recombination lifetime etc. Using this resultant parameter, we could predict the transient response characteristicsof IGBT, for examplex, voltage overshoot, the rising curve of voltage, and the falling curve of current.

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Improvement of Thermal Stability of Ni-Silicide Using Vacuum Annealing on Boron Cluster Implanted Ultra Shallow Source/Drain for Nano-Scale CMOSFETs

  • Shin, Hong-Sik;Oh, Se-Kyung;Kang, Min-Ho;Lee, Ga-Won;Lee, Hi-Deok
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.4
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    • pp.260-264
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    • 2010
  • In this paper, Ni silicide is formed on boron cluster ($B_{18}H_{22}$) implanted source/drains for shallow junctions of nano-scale CMOSFETs and its thermal stability is improved, using vacuum annealing. Although Ni silicide on $B_{18}H_{22}$ implanted Si substrate exhibited greater sheet resistance than on the $BF_2$ implanted one, its thermal stability was greatly improved using vacuum annealing. Moreover, the boron depth profile, using vacuum post-silicidation annealing, showed a shallower junction than that using $N_2$ annealing.