• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.131-131
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• 2008

Silicon carbide (SiC) has attracted significant attention for high frequency, high temperature and high power devices due to its superior properties such as the large band gap, high breakdown electric field, high saturation velocity and high thermal conductivity. We performed Al ion implantation processes on n-type 4H-SiC substrate using a SILVACO ATHENA numerical simulator. The ion implantation model used a Monte-Carlo method. We studied the effect of channeling by Al implantation simulation in both 0 off-axis and 8 off-axis n-type 4H-SiC substrate. We have investigated the Al distribution in 4H-SiC through the variation of the implantation energies and the corresponding ratio of the doses. The implantation energies controlled 40, 60, 80, 100 and 120 keV and the implantation doses varied from $2\times10^{14}$ to $1\times10^{15}cm^{-2}$. In the simulation results, the Al ion distribution was deeper as increasing implantation energy and the doping level increased as increasing implantation doses. After the post-implantation annealing, the electrical properties of Al-implanted p-n junction diode were investigated by SILV ACO ATLAS numerical simulator.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.174-174
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• 2008

Non-volatile memories using ferroelectric-gate field-effect transistors (Fe-FETs) with a metal/ferroelectric/semiconductor gate stack (MFS-FETs) make non-destructive read operation possible. In addition, they also have features such as high switching speed, non-volatility, radiation tolerance, and high density. However, the interface reaction between ferroelectric materials and Si substrates, i.e. generation of mobile ions and short retention, make it difficult to obtain a good ferroelectric/Si interface in an MFS-FET's gate. To overcome these difficulties, Fe-FETs with a metal/ferroelectric/insulator/semiconductor gate stack (MFIS-FETs) have been proposed, where insulator as a buffer layer is inserted between ferroelectric materials and Si substrates. We prepared $SrBi_2Ta_2O_9$ (SBT) film as a ferroelectric layer and $LaZrO_x$ (LZO) film as a buffer layer on p-type (100) silicon wafer for making the MFIS-FET devices. For definition of source and drain region, phosphosilicate glass (PSG) thin film was used as a doping source of phosphorus (P). Ultimately, the n-channel ferroelectric-gate FET using the SBT/LZO/Si Structure is fabricated. To examine the ferroelectric effect of the fabricated Fe-FETs, drain current ($I_d$) versus gate voltage ($V_g$) characteristics in logarithmic scale was measured. Also, drain current ($I_d$) versus drain voltage ($V_d$) characteristics of the fabricated SBT/LZO/Si MFIS-FETs was measured according to the gate voltage variation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.27-27
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• 2008

The different concentration Indium doped ZnO:Al films were grown on glass substrates (Corning 1737) at $200^{\circ}C$ by pulsed laser deposition. The indium doping in AZO films shows the critical effect on the crystallinity, resistivity, and optical properties of the films. The AZO films doped with 0.3 atom % indium content exhibit the highest crystallinity, the lowest resistivity of $4.5\times10^{-4}\Omega$-cm, and the maximum transmittance of 93%. The resistivity of the indium doped-AZO films is strongly related with the crystallinity of the films. The carrier concentration in the indium doped-AZO films linearly increases with increasing indium concentration. The mobility of the AZO films with increasing indium concentration was reduced with an increase in carrier concentration and the decrease in mobility was attributed to the ionized impurity scattering mechanism. In an optical transmittance, the shift of the optical absorption edge to shorter wavelength strongly depends on the electronic carrier concentration in the films.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.4
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• pp.303-308
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• 2011

The Gallium-doped ZnO(GZO) film deposited at a temperature of $200^{\circ}C$ and a pressure of 10 mtorr has an optical transmittance of 89.0% and a resistivity of $2.0\;m{\Omega}{\cdot}cm$ because of its high crystallinity. Effect of $Al_2O_3$ oxide buffer layers on the optical and electrical properties of sputtered ZnO films were intensively investigated for developing the electrodes of opto-electronic devices which demanded high optical transmittance and low resistivity. The use of $Al_2O_3$ buffer layer could increase optical transmittance of GZO film to 90.7% at a wavelength of 550 nm by controlling optical spectrum. Resistivity of deposited GZO films were much dependent on the deposition condition of $O_2/(Ar+O_2)$ flow rate ratio during the buffer layer deposition. It is considered that the $Al_2O_3$ buffer layer could increase the carrier concentration of the GZO films by doping effect of diffused Al atoms through the rough interface.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.1
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• pp.23-29
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• 2001

The effects of Ti-silicide process on the electrical properties of an analog polysilicon capacitor were investigated. To improve the linearity with the applied voltage both electrodes, which are polysilicon in our device, should have almost same material properties. The doping concentrations of both electrodes need to be high and to have the similar levels. Voltage Coefficient of Capacitance (VCC) is one of the properties to represent the linearity of analog capacitor, and it is related with the material and the structure of capacitor. In this study, it was possible to obtain the lower VCC by siliciding the polysilicon areas of capacitor. This is due to the parasitic capacitance at the interfaces between silicide and polysilicons, resulting the decrease of unit capacitance. However, we assumed the creation of positive oxide charge near the lower polysilicon electrode during the silicide process.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.11
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• pp.968-972
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• 2008

Ni/Ti/Al multilayer system ('/'denotes the deposition sequence) was tested for low-resistance ohmic contact formation to Al-implanted p-type 4H-SiC. Ni 30 nm / Ti 50 nm / Al 300 nm layers were sequentially deposited by e-beam evaporation on the 4H-SiC samples which were implanted with Al (norminal doping concentration = $4\times10^{19}cm^{-3}$) and then annealed at $1700^{\circ}C$ for dopant activation. Rapid thermal anneal (RTA) temperature for ohmic contact formation was varied in the range of $840\sim930^{\circ}C$. Specific contact resistances were extracted from the measured current vs. voltage (I-V) data of linear- and circular transfer length method (TLM) patterns. In constrast to Ni contact, Ni/Ti/Al contact shows perfectly linear I-V characteristics, and possesses much lower contact resistance of about $2\sim3\times10^{-4}\Omega{\cdot}cm^2$ even after low-temperature RTA at $840^{\circ}C$, which is about 2 orders of magnitude smaller than that of Ni contact. Therefore, it was shown that RTA temperature for ohmic contact formation can be lowered to at least $840^{\circ}C$ without significant compromise of contact resistance. X-ray diffraction (XRD) analysis indicated the existence of intermetallic compounds of Ni and Al as well as $NiSi_{1-x}$, but characteristic peaks of $Ti_{3}SiC_2$, a probable narrow-gap interfacial alloy responsible for low-resistance Ti/Al ohmic contact formation, were not detected. Therefore, Al in-diffusion into SiC surface region is considered to be the dominant mechanism of improvement in conduction behavior of Ni/Ti/Al contact.

• Journal of Powder Materials
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• v.14 no.4
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• pp.272-276
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• 2007

P-type thermoelectric material $Si_{0.8}Ge_{0.2}$ was sintered by Hot Press process (HP) and the effect of boron ($0.25{\sim}2$ at%) addition on the thermoelectric properties were reported. To enhance the thermoelectric performances, the $Si_{0.8}Ge_{0.2}$, alloys were fabricated by mechanical alloying (MA) and HP. The carrier of p-type SiGe alloy was controlled by B-doping. The effect of sintering condition and thermoelectric properties were investigated. B-doped SiGe alloys exhibited positive seebeck coefficient. The electrical conductivity and thermal conductivity were increased at the small amount of boron content ($0.25{\sim}0.5$ at%). However, they were decreased over 0.5 at% boron content. As a result, the small addition of boron improved the Z value. The Z value of 0.5 at% B doped $Si_{0.8}Ge_{0.2}$ B alloy was $0.9{\times}10{-4}/K$, the highest value among the prepared alloys.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.11-11
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• 2007

1차원 구조체인 반도체 나노선은 앙자제한효과 (quantum confinement effect) 등을 이용하여 고밀도/고효율의 소자 개발이 기대되고 있다. GaN는 상온에서 3.4 eV의 밴드갭 에너지를 갖는 III-V 족 반도체 재료로써 박막의 경우 광전자 소자로 폭넓게 응용되고 있다. 최근 GaN 나노선의 합성에 성공하면서 발광소자, 고효율의 태양전지, HEMT 등으로의 응용을 위한 많은 연구가 활발히 이루어지고 있다. 하지만, 아직까지 GaN 나노선의 전기적 특성을 제어하는 기술은 확립되지 않고 있다. 본 연구에서는 Vapor solid (VS)법을 이용하여 GaN 나노선을 합성하였으며, GaN 분말과 함께 $Mg_2N_3$ 분말을 첨가하여 (Ga,Mg)N 나노선을 성공적으로 합성하였다. 합성시에 GaN와 Mg 소스간의 거리 변화를 통해 Mg 도핑농도를 제어하고자 하였다. 이 같은 방법으로 합 된 (Ga,Mg)N 나노선의 Mg 도핑농도에 따른 결정학적 특성을 알아보고, (Ga,Mg)N 나노선을 이용하여 소자를 제작한 후 그 전기적 특성을 살펴보고자 한다. X-ray diffraction (XRD)과 high-resolution transmission electron microscopy (HRTEM), EDX를 이용하여 합성된 나노선의 결정학적 특성과 Mg의 도핑 농도를 확인하였다. Photo lithography와 e-beam lithography법을 이용하여 (Ga,Mg)N 나노선 field-effect transistor (FET)를 제작하고, channel current-drain voltage ($I_{ds}-V_{ds}$) 와 channel current-gate voltage ($I_{ds}-V_g$) 측정을 통해 (Ga,Mg)N 나노선이 도핑 농도에 따라 n형에서 p형으로 전기적 특성이 변화함을 확인하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.11a
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• pp.594-597
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• 1999

The new green and red phosphors for PDP application activated by T $b^{3+}$ and E $u^{3+}$ were synthesized, and their photoluminance properties were investigated. It was found that the brightness of $Al_3$Gd $B_4$ $O_{12}$ :T $b^{3+}$ green phosphor under 147nm VUV irradiation was higher than that of commercial Z $n_2$ $SiO_4$:M $n^{2+}$ phosphor. But the emitting intensity of A1$_3$Gd $B_4$ $O^{12}$ :E $u^{3+}$ red phosphor was inferior to the commercial (Y,Gd)B $O_3$:E $u^{3+}$. $Al_3$Gd $B_4$ $O_{12}$ Phosphor had a strong excitation band at 160nm associated with the host absorption, and also the photoluminance excitation intensity of $Al_3$Gd $B_4$ $O_{12}$ :T $b^{3+}$ was higher than that of Z $n_2$ $SiO_4$:M $n^{2+}$, but the intensity of $Al_3$Gd $B_4$ $O_{12}$ :E $u^{3+}$ phosphor was smaller than (Y,Gd)B $O_3$:E $u^{3+}$ phosphor In the VUV range. C $e^{3+}$ co-doping in A1$_3$Gd $B_4$ $O^{12}$ :E $u^{3+}$ and substitution of $Al^{3+}$ by G $a^{3+}$ A1$_3$Gd $B_4$ $O^{12}$ :E $u^{3+}$ phosphor were tried, but they did not improved the optical property .d the optical property .ty .

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.7
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• pp.581-586
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• 2007

[ $(Ba_{0.57}Sr_{0.33}Ca_{0.10})TiO_3$ ] (BSCT) powders, prepared by sol-gel method, were mixed with organic vehicle and the BSCT thick films were fabricated by the screen printing method. The structural and dielectric properties were investigated as a function of the $Yb_2O_3$ doping contents. As a result of the TG-DTA, exothermic peak was observed at around $670^{\circ}C$ due to the formation of the polycrystalline perovskite phase. All BSCT thick films showed the typical XRD patterns of a cubic polycrystalline structure. The average thickness of all BSCT thick films was about $70{\mu}m$. The grain size of the BSCT thick film doped with 0.7 mol% $Yb_2O_3$ was approximately $6.2{\mu}m$. The Curie temperature and relative dielectric constant at room temperature decreased with increasing $Yb_2O_3$ amount. Relative dielectric constant and dielectric loss of the specimen doped with 0.1 mol% $Yb_2O_3$ were 4637 and 19 % at Curie temperature, respectively.