• 한국표면공학회지
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• 제34권5호
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• pp.481-485
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• 2001

We investigated the structural and electrical properties of the Ba ($Zr_{x}$ $T_{il-x}$ )$O_3$ (BZT thin films with a mole fraction of x=0.2 and thickness 150 nm for the application in MLCC (Multilayer Ceramic Capacitor). BZT films were prepared on $Pt/SiO_2$/Si substrate at various substrate temperatures by the RF-magnetron sputtering system. When the substrate temperature was above $500^{\circ}C$, we could obtain multi-crystalline BZT films oriented at (110), (111), and (200) directions. The crystallization of the film and high dielectric constant were observed with the increase of substrate temperature. Capacitance of the film deposited at high temperature is more sensitive to the applied voltage than that of the film deposited at low temperature. This paper reports surface morphology, dielectric constant, dissipation factor, and C-V characteristics for BZT films deposited at three different temperatures. The BZT film deposited at 40$0^{\circ}C$ shows stable electrical properties but a little small dielectric constant for MLCC application.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권1호
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• pp.52-62
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• 2004

In this paper we look at the effect of Fringe-Enhanced-Barrier-lowering (FEBL) for high-K dielectric MOSFETs and the dependence of FEBL on various technological parameters (spacer dielectrics, overlap length, dielectric stack, S/D junction depth and dielectric thickness). We show that FEBL needs to be contained in order to maintain the performance advantage with scaled high-K dielectric MOSFETs. The degradation in high-K dielectric MOSFETs is also identified as due to the additional coupling between the drain-to-source that occurs through the gate insulator, when the gate dielectric constant is significantly higher than the silicon dielectric constant. The technology parameters required to minimize the coupling through the high-K dielectric are identified. It is also shown that gate dielectric stack with a low-K material as bottom layer (very thin $SiO_2$ or oxy-nitride) will be helpful in minimizing FEBL. The circuit performance issues with high-K MOS transistors are also analyzed in this paper. An optimum range of values for the dielectric constant has been identified from the delay and the energy dissipation point of view. The dependence of the optimum K for different technology generations has been discussed. Circuit models for the parasitic capacitances in high-K transistors, by incorporating the fringing effects, have been presented.

• Transactions on Electrical and Electronic Materials
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• 제4권1호
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• pp.15-20
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• 2003

NiCr alloys are prepared onto poly-Si/ $SiO_2$/Si substrates to replace Pt bottom electrode with a new one for integration of high dielectric constant materials. Alloys deposited at Ni and Cr power of 40 and 40 W showed optimum properties in the composition of N $i_{1.6}$C $r_{1.0}$. The grain size of films increases with increasing deposition temperature. The films deposited at 50$0^{\circ}C$ showed a severe agglomeration due to homogeneous nucleation. The NiCr alloys from the rms roughness and resistivity data showed a thermal stability independent of increasing annealing temperature. The 80 nm thick BST films deposited onto N $i_{1.6}$C $r_{1.0}$/poly-Si showed a dielectric constant of 280 and a dissipation factor of about 5 % at 100 kHz. The leakage current density of as-deposited BST films was about 5$\times$10$^{-7}$ A/$\textrm{cm}^2$ at an applied voltage of 1 V. The NiCr alloys are possible to replace Pt bottom electrode with new one to integrate f3r high dielectric constant materials.terials.

• 한국세라믹학회지
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• 제49권6호
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• pp.642-647
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• 2012

$TiO_2$ thin films for a pulse power capacitor were deposited by RF magnetron sputtering. The effects of the deposition gas ratio and thickness on the crystallization and electrical properties of the $TiO_2$ films were investigated. The crystal structure of $TiO_2$ films deposited on Si substrates at room temperature changed to the anatase from the rutile phase with an increase in the oxygen partial pressure. Also, the crystallinity of the $TiO_2$ films was enhanced with an increase in the thickness of the films. However, $TiO_2$ films deposited on a PET substrate showed an amorphous structure, unlike those deposited on a Si substrate. An X-ray photoelectron spectroscopy(XPS) analysis revealed the formation of chemically stable $TiO_2$ films. The dielectric constant of the $TiO_2$ films as a function of the frequency was significantly changed with the thickness of the films. The films showed a dielectric constant of 100~110 at 1 kHz. However, the dissipation factors of the films were relatively high. Films with a thickness of about 1000nm showed a breakdown strength that exceeded 1000 kV/cm.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1998년도 추계학술대회 논문집
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• pp.251-254
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• 1998

The ($0.8BaTiO_3-0.1SrTiO_3-0.1MgTiO_3$)+$0.006Nb_2O_5$ ceramics were fabricated by conventional ceramic process. The dielectric property of specimen was investigated that the specimen was sintering temperature at 1,300C for 3hours and then annealed at $1,100^{\circ}C$ for 3hours in a atmosphere (air) to be painted on the surface with CuO paste. The results of the temperature and frequency are varied, the dielectric constant and loss tangent are unsuitable for BL capacitor. The dielectric constants were varied to be negative temperature coefficient(2.000-3,000) in the temperature range between -10 and $140^{\circ}C$, the dissipation factors (tan $\delta$) were some high(0.1-0.3). It was not grain insulation, in cause of the some difficult to be annealed temperature with CuO paste and fired atmosphere. But, we have some different annealing temperature and fired atmosphere, it will be suitable BL(Boundary Layer)capacitor.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.530-533
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• 1998

In this paper, a new scheme of a boosted voltage generator (BVG) is designed for low powr DRAM's. The designed BVG can supply stable $V_{pp}$ using a new circuit operting method. This method controls charge pumping capability by switching the supply voltage and ring oscillator frequency of driving circuit, so the BVG can save area and reduce the powr dissipation during $V_{pp}$ maintaining period. The charge pumping circuit of the BVG suffers no $V_{T}$ loss and is to be applicable to low-voltage DRAM's. $V_{pp}$ level detecting circuit can detect constant value of $V_{pp}$ against temperature variation. The level of $V_{pp}$ varies -0.55%~0.098% during its maintaining period. Charge pumping circuit can make $V_{pp}$ level up to 2.95V with $V_{cc}$ =1.5V. The degecting level of $V_{pp}$ level detecting circuit changes -0.34% ~ 0.01% as temperature varies from -20 to 80.deg. C. The powr dissipation during V.$_{pp}$ maintaining period is 4.1mW.W.1mW.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -2
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• pp.856-859
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• 2002

This paper proposes a high-performance VLSl architecture using distributed arithmetic for higher-order FIR filters with complex coefficients. For the purpose of realizing high sampling rate with small latency in high-order filters, we apply distributed arithmetic[1］. Moreover, in order to decrease drastically the power dissipation, the structure applying not ROM's but optimum function circuits which we have previously proposed, is utilized［2]［3］. However, this structure increases in the number of adders as compared to the conventional structure applying ROM's. In order to realize a more effective method for further higher-order filter, we propose newly an implementation applying two methods which have large effects on the unit using the adders. First , we propose an implementation applying SFAs(Serial Full Adders) and SFSs(Serial Full Subtractors). Second, we propose a structure applying proposed 4-2 adders. Finally, it is shown that the proposed architecture is an effective way to realize low power dissipation and small latency while the sampling rate is kept constant for further higher-order filters with complex coefficients.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 C
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• pp.1361-1363
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• 1997

Zinc oxide-based MOV was fabricated with $SiO_2$ additive ranging from 0.5 to 4.0 mol%, and the microstructure and electrical characteristics were investigated. $Zn_2SiO_4$ phase formed by $SiO_2$ additive was distributed at ZnO grains, grain boundaries, and multiple grain junctions. As the content of $SiO_2$ additive increases, average grain size decreased from 40.6 to $26.9{\mu}m$ due to the Pinning effect by $Zn_2SiO_4$ at grain boundaries Breakdown voltage and nonlinear exponent increased, and leakage current decreased in the range of $11.2{\sim}6.14{\mu}A$ with an increasing $SiO_2$. Donor concentration and interface state density decreased, and barrier height increased in the range of $0.71{\sim}1.04eV$ with an increasing $SiO_2$. While, as the content of $SiO_2$ additive, apparent dielectric constant decreased, peak frequency of dissipation factor decreased in the range of $6.45{\times}10^5{\sim}3.00{\times}10^5Hz$, and dissipation peak was $0.31{\sim}0.22$ at Peak frequency.

• Steel and Composite Structures
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• 제5권6호
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• pp.459-484
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• 2005

In recent years, the use of steel tube confined concrete (STCC) columns has been the interests of many structural engineers. The present study is an attempt to study the monotonic and cyclic behaviours of STCC columns. For the monotonic behaviours, a series of tests on STCC stub columns (twenty one), and beam-columns (twenty) were carried out. The main parameters varied in the tests are: (1) column section types, circular and square; (2) tube diameter (or width) to thickness ratio, from 40 to 162, and (3) load eccentricity ratio (e/r), from 0 to 0.5. For the cyclic behaviours, the test parameters included the sectional types and the axial load level (n). Twelve STCC column specimens, including 6 specimens with circular sections and 6 specimens with square sections were tested under constant axial load and cyclically increasing flexural loading. Comparisons are made with predicted column strengths and flexural stiffness using the existing codes. It was found that STCC columns exhibit very high levels of energy dissipation and ductility, particularly when subjected to high axial loads. Generally, the energy dissipation ability of the columns with circular sections was much higher than those of the specimens with square sections. Comparisons are made with predicted column strengths and flexural stiffness using the existing codes such as AIJ-1997, AISCLRFD- 1994, BS5400-1979 and EC4-1994.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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• pp.657-660
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• 1999

In this paper, we have investigated YMnO$_3$ bulk ceramics, which was made by Mixed oxide method, with Y/Mn ratios of 0.80/1.20, 0.90/1.10, 0.95/1.05, 1.00/1.00, 1.05/0.95 and 1.10/0.90. The samples crystall structure with Y/Mn ratios of 0.95/1.05 was hexagonal structure. The physical properties of YMnO$_3$ ceramics were divided into two groups, the sample with Y/Mn ratios of 0.80/1.20, 0.90/1.10 and 0.95/1.05 is classified to Mn rich sample, and with Y/Mn ratios of 1.00/1.00, 1.05/0.95 and 1.10/0.90 is classified to Y rich sample. The sintering and dielectric properties of this sample were summarized as following sintering density of Mn rich sample was increased. Dissipation factor of Mn rich sample was small The dielectric constant, dissipation factor of sample with Y/Mn ratio (0.90/1.10) were 37, 0.017 respectively at measured 1MHz