• Journal of the Semiconductor & Display Technology
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• v.22 no.2
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• pp.81-86
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• 2023

Recently, there has been an increased demand for light-emitting diode (LED) due to the growing emphasis on environmental protection. However, the use of GaN-based sapphire in LED manufacturing leads to the generation of defects, such as dislocations caused by lattice mismatch, which ultimately reduces the luminous efficiency of LEDs. Moreover, most inspections for LED semiconductors focus on evaluating the luminous efficiency after packaging. To address these challenges, this paper aims to detect defects at the wafer stage, which could potentially improve the manufacturing process and reduce costs. To achieve this, image processing and deep learning-based defect detection techniques for Sapphire Epi-Wafer used in Green LED manufacturing were developed and compared. Through performance evaluation of each algorithm, it was found that the deep learning approach outperformed the image processing approach in terms of detection accuracy and efficiency.

• Journal of the Semiconductor & Display Technology
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• v.22 no.3
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• pp.1-7
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• 2023

Recently, in the semiconductor industry, memory device market is focusing on producing ultra-thin wafers for high integration. In the wafer manufacturing process, wafers after backgrinding and CMP process must be picked up as individual dies and subjected to be peeled off from the dicing tape. However, ultra-thin dies are vulnerable to the possibility of breakage and failure in their thickness and size. This research studies the mechanism of peeling a die with a high-aspect ratio using a thermopneumatic method instead of a die ejector with physical pins. Setting compressed air and the temperature as main factors, we determine the success of the digester using thermopneumatic system and analyze the good die to find the possibility of making mass-production equipment.

• Journal of the Semiconductor & Display Technology
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• v.23 no.2
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• pp.135-142
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• 2024

Cu-Cu bonding, one of the key technologies in advanced packaging, enhances semiconductor chip performance, miniaturization, and energy efficiency by facilitating rapid data transfer and low power consumption. However, the quality of the interface bonding can significantly impact overall bond quality, necessitating strategies to quickly detect and classify in-process defects. This study presents a methodology for detecting defects in wafer junction areas from Scanning Acoustic Microscopy images using a ResNet-50 based deep learning model. Additionally, the use of the defect map is proposed to rapidly inspect and categorize defects occurring during the Cu-Cu bonding process, thereby improving yield and productivity in semiconductor manufacturing.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.7
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• pp.525-529
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• 1999

The influence of ambient gases on field emission performance of Mo-field emitter array(FEA) in the frit-sealing step of field emission display(FED) packaging process was investigated. Mo-tip FEA was mounted on the glass substrate having a surrounded frit(Ferro FX11-137) and fired at $415^{\circ}C$ in the ambient gases of air, $N_2$ and Ar. The Ar gas was proved to be most proper ambient among the used gases through evaluating the turn-on voltage and field emission current of the fired Mo-tip FEA devices. It was confirmed that the Mo surface fired in Ar ambient was less oxidized when compared with another ones annealed in air and Ar ambient by the AFM, XPS, AES and SIMS analysis. Finally, the 3.5 inch-sized Mo-tip FED, which was packaged using frit-sealing process in the Ar ambient, was proposed.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.557-560
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• 2008

The main goal of this work is to fabricate light emitting diode (LED) module and apply it to mobile handset. We first fabricated the blue-color LED based on the AlInGaN cell structure with size of $200\;{\mu}m\;{\times}\;200\;{\mu}m$. Also we proposed a new $1.0\;mm\;{\times}\;0.5\;mm$ (1005size) packaging procedure for the LED cell. Thus the overall dimension of our LED cell was as small as $1.0\;mm\;{\times}\;0.5\;mm\;{\times}\;0.4\;mm$ ($W\;{\times}\;L\;{\times}\;T$). As far as we knew it was the first time that this small LED cell dimension had been fabricated and operated.

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1946-1949
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• 1996

We have performed silicon-to-silicon anodic bonding using glass layer deposited by electron beam evaporation. Wafers can be bonded at $135^{\circ}C$ with an applied voltage of $35V_{DC}$, which enables application of this technique to the vacuum packaging of microelectronic devices, because its bonding temperature and voltage are low. From the experimental results, we have found that the evaporated glass layer more than $1\;{\mu}$ m thick was suitable for anodic bonding. The role of sodium ions for anodic bonding was also investigated by theoretical bonding mechanism and experimental inspection.

• Journal of the Microelectronics and Packaging Society
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• v.29 no.3
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• pp.49-53
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• 2022

Ultra-thin glass (UTG) has been widely used in foldable display as a cover window for the protection of display and has a great potential for rollable display and various flexible electronics. The foldable display is under impact loading by bending and touch pen and exposed to other external impact loads such as drop while people are using it. These external impact loads can cause cracks or fracture to UTG because it is very thin under 100 ㎛ as well as brittle. Cracking and fracture lead to severe reliability problems for foldable smartphone. Thus, this study constructs finite element analysis (FEA) model for the pen drop test which can measure the impact resistance of UTG and conducts mechanical modeling to improve the reliability of UTG under impact loading. When a protective layer is placed to an upper layer or lower layer of UTG layer, stress mechanism which is applied to the UTG layer by pen drop is analyzed and an optimized structure is suggested for reliability improvement of UTG layer. Furthermore, maximum principal stress values applied at the UTG layer are analyzed according to pen drop height to obtain maximum pen drop height based on the strength of UTG.

• Journal of the Semiconductor & Display Technology
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• v.5 no.2 s.15
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• pp.33-36
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• 2006

Many issues arose to use the Pb-free solder as adhesive materials in MEMS ICs and packaging. Then this study for easy and simple sealing method using adhesive materials was carried out to maintain hermetic characteristic in MEMS Package. In this study, Hermetic characteristic using negative PR (XP SU-8 3050 NO-2) as adhesive at the interface of Si test coupon/glass substrate and Si test coupon/LTCC substrate was examined. For experiment, the dispenser pressure was 4 MPa and the $200\;{\mu}m{\Phi}$ syringe nozzle was used. 3.0 mm/sec as speed of dispensing and 0.13 mm as the gap between Si test coupon and nozzle was selected to machine condition. 1 min at $65^{\circ}C$ and 15 min at $95^{\circ}C$ as Soft bake, $200\;mj/cm^2$ expose in 365 nm wavelength as UV expose, 1 min at $65^{\circ}C$ and 6 min at $95^{\circ}C$ as Post expose bake, 60 min at $150^{\circ}C$ as hard bake were selected to activation condition of negative PR. Hermetic sealing was achieved at the Si test coupon/ glass substrate and Si test coupon/LTCC substrate. The leak rate of Si test coupon/glass substrate was $5.9{\times}10^{-8}mbar-l/sec$, and there was no effect by adhesive method. The leak rate of Si test coupon/LTCC substrate was $4.9{\times}10^{-8}mbar-l/sec$, and there was no effect by dispensing cycle. Better leak rate value could be achieved to use modified substrate which prevent PR flow, to increase UV expose energy and to use system that controls gap automatically with vision.

• Journal of the Microelectronics and Packaging Society
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• v.22 no.1
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• pp.21-25
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• 2015

Bending fatigue characteristics of Cu films and $8{\mu}m$ width Cu interconnects on flexible substrates were investigated, and fatigue reliability improvement was achieved through Mo-Ti alloy adhesion layer. Tensile bending fatigue reliability of Cu interconnects is 3 times lower than that of Cu films, and even compressive bending fatigue reliability of Cu interconnects is 6 times lower than that of Cu films. From these results, mechanical crack formation could be fatal in Cu interconnects. With Mo-Ti adhesion layer, fatigue reliability of Cu films and interconnects were enhanced due to the increase of adhesion strength and the suppression of slip induced crack initiation.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.2
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• pp.85-89
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• 2014

We propose the new fabrication method of a 70 nm half-pitch wire grid polarizer with high performance using magnetic soft mold. The device is a form of aluminium gratings on a PET(Polyethylene phthalate) substrate whose size of $3cm{\times}3cm$ is compatible with a TFT_LCD(Tin Flat Transistor Liquid Crystal Display) panel. A magnetic soft mold with a pitch of 70 nm is fabricated using two-step replication method. As a result, we get a NWGP pattern which has 70.39 nm line width, 64.76 nm depth, 140.78 nm pitch, on substrate. The maximum and minimum transmittances of the NWGP at 800 nm are 75% and 10%, respectively. This work demonstrates a unique cost-effective solution for nanopatterning requirements in consumer electronics components.