• Title/Summary/Keyword: direct-conversion receiver

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Dual-Band Six-Port Direct Conversion Receiver with I/Q Mismatch Calibration Scheme for Software Defined Radio (Software Defined Radio를 위한 I/Q 부정합 보정 기능을 갖는 이중 대역 Six-Port 직접변환 수신기)

  • Moon, Seong-Mo;Park, Dong-Hoon;Yu, Jong-Won;Lee, Moon-Que
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.6
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    • pp.651-659
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    • 2010
  • In this paper, a new six-port direct conversion receiver for high-speed multi-band multi-mode wireless communication system such as software defined radio(SDR) is proposed. The designed receiver is composed of two CMOS four-port BPSK receivers and a dual-band one-stage polyphase filter for quadrature LO signal generation. The four-port BPSK receiver, implemented in 0.18 ${\mu}m$ CMOS technology for the first time in microwave-band, is composed of two active combiners, an active balun, two power detector, and an analog decoder. The proposed polyphase filter adopt type-I architecture, one-stage for reduction of the local oscillator power loss, and LC resonance structure instead of using capacitor for dual-band operation. In order to extent the operation RF bandwidth of the proposed six-port receiver, we include I/Q phase and amplitude calibration scheme in the six-port junction and the power detector. The calibration range of the phase and amplitude mismatch in the proposed calibration scheme is 8 degree and 14 dB, respectively. The validity of the designed six-port receiver is successfully demonstrated by modulating M-QAM, and M-PSK signal with 40 Msps in the two-band of 900 MHz and 2.4 GHz.

Design of Microwave Direct Conversion Receiver Using Sub-Harmonics Pumped Ring Mixer (SHP 링혼합기를 이용한 마이크로파 직접변환 수신기 설계)

  • Kim, Kab-Ki;Kim, Han-Suk;Yoo, Hong-Gil;Lee, Jong-Arc
    • Journal of IKEEE
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    • v.3 no.1 s.4
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    • pp.69-78
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    • 1999
  • In this paper, direct conversion receiver was designed to even harmonic anti-paralled diode pair ring mixer. Using a second harmonic component of LO instead of LO signal and RF signal are mixed by SHP(Sub Harmonic Pumped) mixer with anti-parallel diode pair. Canceling the harmonics of LO signal in ring mixer, SHP mixer using anti-parallel diode pair could mostly reduce the radiation of LO signal through a input port the most, good isolation characteristic, and low spurious characteristic by LO signal was shown over broad band. The produced SHP mixer showed LO/IF, RF/IF and LO/RF isolation was 24.6dB,36.2dB and 22.5dB respectively. And conversion loss was measured 15.6dB, IF output -35.6dBm with -20dBm RF input and 5.5dBm LO signal. 1dB compression point of If signal, in respect to RF signal, was found at the 0dbm RF signal.

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A Design of Direct conversion method 2.45GHz Low-IF Mixer Using CMOS 0.18um Process (CMOS 0.18um 공정을 이용한 2.45GHz Low-IF 직접 변환 방식 혼합기 설계)

  • Choi, Jin-Kyu;Kim, Hyeong-Seok
    • 한국정보통신설비학회:학술대회논문집
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    • 2008.08a
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    • pp.414-417
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    • 2008
  • This paper presents the design and analysis of 2.45GHz Low-IF Mixer using CMOS 0.18um. The Mixer is implemented by using the Gilbert-type configuration, current bleeding technique, and the resonating technique for the tail capacitance. And the design of this Double Balance Mixer is based on its lineaity since it is important in the interference cancellation system. The low flicker noise mixer is implemented by incorporating a double balanced Gilber-type configuration, the RF leakage-less current bleeding technique, and Cp resonating technique. The proposed mixer has a simulated conversion gain of 16dB a simulated IIP3 of -3.3dBm and P1dB is -19dBm. A simulated noise figure of 6.9dB at l0MHz and a flicker corner frequency of 510kHz while consuming only 10.65mW od DC power. The layout of Mixer for one-chip design in a 0.18-um TSMC process has 0.474mm$\times$0.39 mm size.

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5GHz CMOS Quadrature Up-Conversion Mixer

  • Lee, Jang-U;Kim, Sin-Nyeong;Yu, Chang-Sik
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.617-618
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    • 2006
  • A CMOS quadrature Up-converter for a direct-conversion receiver of 5.15-5.825GHz wireless LAN is described. The Up-converter consists of two sub-harmonic mixers, for I and Q channels, and an LO generation network. In order to decrease the number of inductor, I and Q path are merged. The simulation results including all the parasitics show -17.3dB conversion gain at center and -8 dBv oIP3 while consuming 22.968mW under 1.8V supply. The quadrature Up-converter is under fabrication with the other transmitter blocks in a $0.18{\mu}m$ CMOS technology.

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Design and analysis of UWB Receiver's LNA(Low Noise Amplifier) and Mixer using RF Front-end (RF Front-end를 응용한 UWB(초광대역) 수신부의 LNA와 Mixer에 대한 분석 및 설계)

  • Kwak, Jae-Kwang;Ko, Kwang-Cheol
    • Proceedings of the IEEK Conference
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    • 2004.06a
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    • pp.225-228
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    • 2004
  • This paper has been studied about UWB(Ulra wide-band)'s LNA(Low Noise Amplifier) and Mixer. The UWB is a new technology that is being pursed for both commercial and military purposes. Direct conversion architectures that convert RF signals have potential to achieve such terminals, because they eliminate the need for non-programmable image-rejection filters and IF channel filters. And this architecture promises better performance in power, size, and cost than existing heterodyne - based receivers. This Receiver architectures combines low-noise amplifier, mixer. And then this paper has designed suitable UWB's LNA and Mixer.

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A 950 MHz CMOS RF frequency synthesizer for CDMA wireless transceivers (CDMA 이동 통신 단말기용 950 MHz CMOS RF 주파수 합성기)

  • 김보은;김수원
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.7
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    • pp.18-27
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    • 1997
  • A CMOS 950 MHz frequency synthesizer is designed and fabricated in a 0.8.mu.m standard CMOS process for IS-95-A CDMA mobile communication transceivers To utilize a CMOS ring VCO in a CDMA wireless communication receisver, we employed a QDC (quasi-direct conversion) receiver architecture for CDMA applications. Realized RF frequency synthesizer used as the RF local oscillator for a QDC receiver exhibits a phase noise of -92 dBc/Hz at 885kHz offset from the 950.4 MHz carrier, which complies with IS-95-A CDMA specification. It has a rms jitter of 23.7 ps, and draws 30mA from a 5V supply. Measured I/Q phase error of the 950.4 output signals is 0.7 degree.

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The Design of CMOS Multi-mode/Multi-band Wireless Receiver

  • Hwang, Bo-Hyeon;Jeong, Jae-Hun;Yu, Chang-Sik
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.615-616
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    • 2006
  • Nowadays, the need of multi-mode/multi-band transceiver is rapidly increasing, so we design a direct conversion RF front-end for multi-mode/multi-band receiver that support WCDMA/CDMA2000/WIBRO standard. It consists of variable gain reconfigurable LNA and single input double balanced Mixer and complementary differential LC Oscillator. The circuit is implemented in 0.18 um RF CMOS technology and is suitable for low-cost mode/multi-band.

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A Design and Implementation of Digital Ultra-Narrowband Walky-Talky Using Direct Conversion Method (직접 변환 방식을 이용한 디지털 초협대역 무전기 설계 및 구현)

  • Chong Young-Jun;Kang Min-Soo;Yoo Sung-Jin;Chung Tae-Jin;Oh Seung-Hyeub
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.6 s.97
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    • pp.603-614
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    • 2005
  • In this paper, digital ultra-narrowband Walky-Talky using direct conversion method for CQPSK modulation scheme is implemented with satisfying the requirements of APCO P25. RF transceiver design and implementation scheme that minimize the influence of DC-offset and AC-coupling at ultra-narrowband is proposed. This scheme also minimizes the influence of nonlinear characteristic at power amplifier fir CQPSK modulation method. Test results of full system including DSP module and direct conversion RF transceiver show that FCC emission mask at 36.8 dBm PEP meets the standard requirements. The characteristic of receiver AGC by PWM control signal is linear at 40 dB dynamic range and voice communication at input power level of -116 dBm is successful. Also it is verified that the performance of BER versus frequency offset and versus SNR meets the standard requirements.

Design of QPSK Demodulator Using CMOS BPSK Receiver and Reflection-Type Phase Shifter (CMOS 기반 BPSK 수신기와 반사형 위상 천이기를 이용한 QPSK 복조기 설계)

  • Moon, Seong-Mo;Park, Dong-Hoon;Yu, Jong-Won;Lee, Moon-Que
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.8
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    • pp.770-776
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    • 2009
  • We propose and demonstrate an I/Q demodulator using four-port BPSK demodulator base on additive mixing and reflection-type phase shifter using hybrid technique. Previously, the conventional I/Q demodulator base on multiplicative or additive mixing method divides I/Q signal path from mixer to parallel-to-serial converter. In this paper, we propose new I/Q demodulator without dividing I/Q baseband signal path. The proposed schematic requires half size in implementation and half power consumption in baseband path compared with the conventional receiver. Also, the proposed receiver eliminates parallel-to-serial converter after data decoding. The proposed circuit has been successfully demodulated a QPSK signal with the L-band carrier frequency and 20 Mbps data rate.

A Study on the Phase Diversity and Optimal I/Q Signal Combining Methods on a UHF RFID Receiver (UHF RFID 수신기의 위상 다이버시티 및 최적 I/Q 신호 결합 방법에 관한 연구)

  • Jang, Byung-Jun;Song, Ho-Jun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.4
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    • pp.442-450
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    • 2008
  • In this paper, the phase diverisity in a direct-conversion receiver for a UHF RFID reader is analyzed and the optimal I/Q signal combining methods is presented with respect to tag modulation. At first, fading characteristics of a single channel receiver is shown to prove the importance of phase diversity due to the phase relationship between the backscattered signal and the local oscillator. And the optimal signal combining methods are presented in order to overcome the signal power reduction due to phase diversity. In case of ASK, the power combining method is presented for the optimal I/Q combining. And the arctangent and principal component combining methods using covariance matrix of I and Q channels are presented for the optimal I/Q combining in case of PSK. In order to analyze the performance of suggested methods, the selection diversity and the optimal combining methods are compared. According to analysis and simulation results, the optimal combining methods have a maximum 3 dB SNR enhancement than selection diversity.