• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.10
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• pp.40-47
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• 2016

In this paper, a dual mode buck converter with an ability to change mode is proposed, which is suitable particularly for portable device. The problem of conventional mode control circuit is affected by load variation condition such as suddenly or slowly. To resolve this problem, the mode control was designed with slow clock method. Also, when change from the PFM(Pulse Frequency Modulation) mode to the PWM(Pulse Width Modulation) mode, to use the counter to detect a high load. And the user can select mode transition point in load range from 20mA to 90mA by 3 bit digital signal. The circuits are implemented by using BCDMOS 0.18um 2-polt 3-metal process. Measurement environment are input voltage 3.7V, output voltage 1.2V and load current range from 10uA to 500mA. And measurement result show that the peak efficiency is 86% and ripple voltage is less 32mV.

• Journal of Korea Multimedia Society
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• v.12 no.3
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• pp.329-334
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• 2009

When an optical disc is being played. the pick-up converts light to analog signal at first. The analog signal is equalized for removing the inter-symbol interference and then the equalized analog signal is converted into the digital signal for extracting the synchronized data and clock signals. There are a lot of algorithms that minimize the BER in extracting the synchronized data and clock when high. density optical disc like BD is being played in low speed. But if the high-density optical disc is played in high speed, it is difficult to adopt the same extraction algorithm to data PLL and PRML architecture used in low speed application. It is because the signal with more than 800MHz should be processed in those architectures. Generally, in the 0.13-${\mu}m$ CMOS technology, it is necessary to have the high speed analog cores and lots of efforts to layout. In this paper, the parallel data PLL and PRML architecture, which enable to process in BD 8x speed of the maximum speed of the high-density optical disc as the extracting data and clock circuit, is proposed. Test results show that the proposed architecture is well operated without processing error at BD 8x speed.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.583-585
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• 2012

In this paper, we introduce a design method for a broadband planar quasi-Yagi antenna (QYA) for terrestrial digital television (DTV) receiving. The coplanar strip line feeding the driver dipole is connected to a microstrip line and is terminated by short circuit. By appending a wide strip-type director at a location close to the driver dipole, a broadband impedance matching and a gain characteristics in a high frequency region are obtained. The gain characteristics in a low frequency region are improved by adding a reflector formed by a truncated ground plane. To reduce the antenna size, the strip-type dipole and reflector are modified to half bowtie (V)-shaped elements. The effects of various parameters on the antenna characteristics are examined. An antenna, as an design example for the proposed antenna, is designed for the operation in the frequency band of 470-806 MHz for terrestrial DTV. The optimized antenna is fabricated on an FR4 substrate and tested experimentally to verify the results of this study.

• Journal of Engineering Education Research
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• v.6 no.1
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• pp.56-64
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• 2003

In this paper, we designed and implemented a client/server distributed environment and developed a web-based virtual laboratory system for electronic circuits. Since our virtual laboratory system is implemented to describe the on-campus laboratory, the learners can obtain similar experimental data through it. The proposed virtual laboratory system is composed of four important components : Principle Classroom, Virtual Experiment Classroom, Evaluation Classroom and Overall Management System. Through our virtual laboratory, the learners will be capable of learning the concepts and theories related to electronic circuit experiments and how to operate the experimental equipments such as multimeters, function generators, digital oscilloscopes and DC power supplies. Also, every experimental activity occurred in our virtual laboratory is recorded on database and printed out on the preliminary report form. All of these can be achieved by the aid of the Management System. The database connectivity on the web is made by PHP and the virtual labol'atory environment is set up slightly differently for each learner. Finally, we have obtained several affirmative effects such as reducing the total experimental hours and the damage rate for experimental equipments and increasing learning efficiencies as well as faculty productivity.

• Laser Solutions
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• v.11 no.4
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• pp.29-34
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• 2008

Ultraviolet laser micromachining has increasingly been applied to the electronics industry where precision machining of high-density, multi-layer, and multi material components is in a strong demand. Due to the ever-decreasing size of electronic products such as cellular phones, MP3 players, digital cameras, etc., flexible printed circuit board (FPCB), multi-layered with polymers and metals, tends to be thicker. In present, multi-layered FPCBs are being mechanically cut with a punching die. The mechanical cutting of FPCBs causes such defects as burr on layer edges, cracks in terminals, delamination and chipping of layers. In this study, the laser cutting mechanism of FPCB was examined to solve problems related to surface debris and short-circuiting that can be caused by the photo-thermal effect. The laser cutting of PI and FCCL, which are base materials of FPCB, was carried out using a pico-second laser(355nm, 532nm) and nano-second UV laser with adjusting variables such as the average/peak power, scanning speed, cycles, gas and materials. Points which special attention should be paid are that a fast scanning speed, low repetition rate and high peak power are required for precision machining.

• Journal of the Institute of Convergence Signal Processing
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• v.11 no.3
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• pp.197-202
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• 2010

In this paper, multi-channel vital signal monitoring system was implemented for home healthcare. The system able to measure vital signal for example ECG, PPG and temperature simultaneously at patients’ home. The vital signal is an essential parameter for healthcare application and can be easily extracted from patients. The implemented system consist of sensor parts for signal extraction, signal amplifier and filter for analog circuit, analog signal to digital conversion for controlling devices and lastly the monitoring program. The system able to transmit vital signals using Bluetooth wireless communications to personal computer or home server. And the tele-monitoring system able to display real-time signals using web monitoring program. In medical application, the vital signal parameter able to stored and saved in the web server for further medical analysis. This system opens up the possibilities of ubiquitous healthcare where further implementation can be easily done.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.4
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• pp.1100-1112
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• 1998

In this paper, a novel method of minimizing the phase error is proposed. A DP-PLL system using this method is implemented and its performacnce is investigated, too. The DP-PLL system detects the phase error between reference clock and locally generated system clock. The phase difference is then reported as a PEV(Phase Error Variation), which is propoced from the delayted n-tap rising dege clock circuit with 5ns resolution in the phase detector. The algorithm is used to track the optimal DAC coefficients, which are adjusted from sample to sample in such a way as to minimize the PEV. The proposed method is found to have remarkable good potential for fast and accurate phase error tracking characteristic. The algorithm shows good performance to supress the low frequency jitter.-ending points, we design new basis functions based on the Legendre polynomial and then transform the error signals with them. When applied to synthetic images such as circles, ellipses and etc., the proposed method provides, in overall, outstanding results in respect to the transform coding gain compared with DCT and DST. And in the case when applied to natural images, the proposed method gives better image quality over DCT and comparable results with DST.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.8
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• pp.809-815
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• 2003

It is very important to get very high switching speed as well as low phase noise of frequency synthesizer in the OFDM/FH communication system. In this paper we compare the phase noises and switching speeds of the conventional PLL and digital hybrid PLL(DH-PLL) frequency synthesizer, also, we investigate the effect of phase noise on the performance of OFDM/FH communication system. DH-PLL has high switching speed property at the cost of circuit complexity and more power consumption. Unlike the conventional PLL in which the phase noise and switching speed have the trade off relationship in respect of loop filter bandwidth, DH-PLL frequency synthesizer can perform fast switching speed and low phase noise simultaneously. Under the condition of same hopping speed requirement, DH-PLL can achieve faster switching speed and lower SNR penalty compared with conventional PLL in the OFDM/FH communication system.

• Journal of the Korea Society of Computer and Information
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• v.12 no.3
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• pp.37-50
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• 2007

In this paper, we designed and implementation of the high speed neuron processor for real time object recognition in the making automatic system. and we designed of the PE(Processing Element) used residue number system without carry propagation for the high speed operation. Consisting of MAC(Multiplication and Accumulation) operator using residue number system and sigmoid function operator unit using MAC(Mixed Radix conversion) is designed. The designed circuits are descript by C language and VHDL(Very High Speed Integrated Circuit Hardware Description Language) and synthesized by compass tools and finally, the designed processor is fabricated in $0.8{\mu}m$ CMOS process. we designed of MAC operation unit and sigmoid proceeding unit are proved that it could run time 0.6nsec on the simulation and improved to the speed of the three times and decreased to hardware size about 50%, each order. The designed neuron processor can be implemented of the object recognition in making automatic system with desired real time processing.

• Korean Journal of Optics and Photonics
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• v.13 no.6
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• pp.543-547
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• 2002

We have constructed two extended-cavity diode lasers which are phase-locked with a 9.2 GHz frequency offset. We adopted a digital servo circuit for the phase-locking. The relative linewidth of the phase-locked lasers was less than 2 Hz. Using the measured beat spectrum, we found the carrier concentration to be about 93 %. We measured phase noise and relative frequency stability of the lasers. The Allan deviation at the gate time of 20 s was $2.7{\times}10^{-19}$.