• Title/Summary/Keyword: digital signal process

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A Development of DDS Based Chirp Signal Generator and X-Band Transmitter-Receiver for Small SAR Sensor (DDS 기반의 소형 SAR 시스템 송수신장비 개발)

  • Song, Kyoung-Min;Lee, Ki-Woong;Lee, Chang-Hyun;Lee, Woo-Kyung;Lee, Myeong-Jin
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.3
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    • pp.326-329
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    • 2016
  • UAVs(Unmanned Aerial Vehicle) can be used in variant fields fornot only combat, but also recon, observation and exploration. Moreover, UAVs capacity can be expanded to impossible missions for existing surveillance system such as SAR(Synthetic Aperture Radar) technology that collecting images from all weather conditions. In recent days, with development of highly efficient IC and lightened system technology, there are significant increase of researches and demands to make SAR sensor as a payload of UAV. Therefore, this paper contains development process and results of small signal generator and RF device as a core module of SAR system based on the digital device of DDS.

Endpoint Detection of Speech Signal Using Lyapunov Exponent (리아프노프 지수를 이용한 음성신호 종점 탐색 방법)

  • Zang, Xian;Kim, Jeong-Yeon;Chong, Kil-To
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.46 no.1
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    • pp.28-33
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    • 2009
  • In the research of speech recognition, locating the beginning and end of a speech utterance in a background of noise is of great importance. The conventional methods for speech endpoint detection are based on two simple time-domain measurements-short-time energy, and short-time zero-crossing rate, which couldn't guarantee the precise results if in the low signal-to-noise ratio environments. This paper proposes a novel approach that finds the Lyapunov exponent of time-domain waveform. This proposed method has no use for obtaining the frequency-domain parameters for endpoint detection process, e.g. Mel-Scale Features, which have been introduced in other paper. Accordingly, this algorithm is low complexity and suitable for Digital Isolated Word Recognition System.

On the Real Time Implementation of the TWS System Using the TMS320C25 DSP (TMS320C25 DSP를 이용한 실시간 TWS 시스템 구현)

  • Kee, Seok-Cheol;Lee, Sang-Uk
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.6
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    • pp.147-155
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    • 1989
  • In this paper, a real-time implementation of the TWS(track-while-scan) system using the high-speed DSP (digital signal processor) TMS320C25 is described. First, attempts have been made to investigate the FWL (finite word length) effect, which is caused by employing a fixed point arithmetic, of implementing the Kalman filter. The real-time TWS system consists of TWS arithmetic unit, scan converter, and system controller. In addition, the TWS system is in tegrated in the Multi-Bus. In experiment, it is observed that by employing the floating point arithmetic the computation time of 0.35sec is required for tracking 8 targets simultaneously, while 0.28sec is required for the fixed point arithmetic. Since the TWS system is designed to track up to 8 targets simultaneously, we conclude that the system is enough to process Kalman filter in a real-time.

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Design of a 6-bit 500MS/s CMOS A/D Converter with Comparator-Based Input Voltage Range Detection Circuit (비교기 기반 입력 전압범위 감지 회로를 이용한 6비트 500MS/s CMOS A/D 변환기 설계)

  • Dai, Shi;Lee, Sang Min;Yoon, Kwang Sub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38A no.4
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    • pp.303-309
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    • 2013
  • A low power 6-bit flash ADC that uses an input voltage range detection algorithm is described. An input voltage level detector circuit has been designed to overcome the disadvantages of the flash ADC which consume most of the dynamic power dissipation due to comparators array. In this work, four digital input voltage range detectors are employed and each input voltage range detector generates the specific clock signal only if the input voltage falls between two adjacent reference voltages applied to the detector. The specific clock signal generated by the detector is applied to turn the corresponding latched comparators on and the rest of the comparators off. This ADC consumes 68.82mW with a single power supply of 1.2V and achieves 4.9 effective number of bits for input frequency up to 1MHz at 500 MS/s. Therefore it results in 4.75pJ/step of Figure of Merit (FoM). The chip is fabricated in 0.13-um CMOS process.

A Study on 2-D FIR Filter Using the Bernstein Polynomial (Bernstein 다항식을 이용한 2-D FIR 필터에 관한 연구)

  • Seo, Hyun-Soo;Kang, Kyung-Duck;Kim, Nam-Ho
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.2
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    • pp.443-446
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    • 2005
  • As modern society needs to process of acquisition, storage and transmission of much information, the importance of signal processing is increasing and various digital filters are used in the two-dimensional signal such as image. And kinds of these digital filters are IIR(infinite impulse response) filter and FIR(finite impulse response) filter. And FIR filter which has the phase linearity, the easiness of creation and stability is applied to many fields. In design of this FIR filter, flatness property is a important factor in pass-band and stop-band. In this paper, we designed a 2-D Circular FIR filter using the Bernstein polynomial, it is presented flatness property in pass-band and stop-band. And we simulated the designed filter with noisy test image and compared the results with existing methods.

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A Design of Single Pixel Photon Counter for Digital X-ray Image Sensor (X-ray 이미지 센서용 싱글 픽셀 포톤 카운터 설계)

  • Baek, Seung-Myun;Kim, Tae-Ho;Kang, Hyung-Geun;Jeon, Sung-Chae;Jin, Seung-Oh;Huh, Young;Ha, Pan-Bong;Park, Mu-Hun;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.2
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    • pp.322-329
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    • 2007
  • A single pixel photon counting type image sensor which is applicable for medical diagnosis with digitally obtained image and industrial purpose has been designed with $0.18{\mu}m$ triple-well CMOS process. The designed single pixel for readout chip is able to be operated by single supply voltage to simplify digital X-ray image sensor module and a preamplifier which is consist of folded cascode CMOS operational amplifier has been designed to enlarge signal voltage(${\Delta}Vs$), the output voltage of preamplifier. And an externally tunable threshold voltage generator circuit which generates threshold voltage in the readout chip has been newly proposed against the conventional external threshold voltage supply. In addition, A dark current compensation circuit for reducing dark current noise from photo diode is proposed and 15bit LFSR(Linear Feedback Shift Resister) Counter which is able to have high counting frequency and small layout area is designed.

An Image Restoration using Nonlinear Filter in Mixed Noise Environment (복합잡음 환경에서 비선형 필터를 사용한 영상복원)

  • Long, Xu;Kim, Nam-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.10
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    • pp.2447-2453
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    • 2013
  • The digital images are being degraded by noise in the process of acquisition, storage and transmission, Gaussian or impulse noise is the representative noise. Meanwhile, the image has lots of tendency to be degraded by complex noise, so various researches are being conducted for reducing these complex noise. In this paper, to remove complex noise, the algorithm processed by modified switching median filter and modified adaptive weighted filter according to the result after judging the kinds of noise is proposed. In the simulation result, excellent denoising capabilities. Furthermore, we compared proposed algorithm with existing methods for objective judgement, and PSNR(peak signal to noise ratio) is used by the criterion of judgement.

A FPGA-based Development of Ultrasonic Level Meter for Measuring Oil Levels of Vehicle Transmissions (차량의 변속기 오일레벨 측정을 위한 FPGA 기반 초음파 레벨 측정기 개발)

  • Kang, Moon-Ho;Park, Yoon-Chang
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.11
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    • pp.5427-5433
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    • 2012
  • In this paper a ultrasonic level meter for accurately and simply measuring oil levels of vehicle transmission is developed and its effectiveness is shown by experiments. By using a FPGA, all digital signal processes for the oil level calculation is fulfilled, and the programming on a FPGA project IDE enables very short developing time. And besides, analog circuits including a transmit/receive switch, multi-stage active filters and an envelope detect circuit are designed to process low-level ultrasonic echo signal. Under experiments, the designed level meter has proven to have the accuracy of about within 1[mm] scale.

The Optimization using PCB EM interpretation of GEO satellite's L Band Converter (정지궤도위성용 L대역변환반의 PCB EM 해석을 통한 최적화)

  • Kim, Ki-Jung;Ko, Hyeon-Seok
    • The Journal of the Korea institute of electronic communication sciences
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    • v.8 no.8
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    • pp.1219-1226
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    • 2013
  • This study is the analysis and verification process of the L-band satellite communications repeater thought PCB & circuit EM analysis. System performance can be vulnerable to various spurious inside the L-band satellite transponder, power conversion board, digital signal board, TM/TC board, such as control panels and blocks that are linked signal components when the winch is increased due to the noise component. So the whole system can cause performance degradation. PCB resonance analysis and EM simulation can be easily analyzed for a variety of optimal. Also, by setting the ports on the PCB, H/W designer wants to can easily analyze system.

Design of a Wide-Band CMOS VCO With Reduced Variations of VCO Gain and Frequency Steps for DTV Tuner Applications (VCO 이득 변화와 주파수 간격 변화를 줄인 DTV용 광대역 CMOS VCO 설계)

  • Ko, S.O.;Sim, S.M.;Sho, H.T.;Kim, C.K.;Yu, C.G.
    • Proceedings of the KIEE Conference
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    • 2008.10b
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    • pp.217-218
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    • 2008
  • Since the digital TV signal band is very wide ($54{\sim}806MHz$), the VCO used in the frequency synthesizer must also have a wide frequency tuning range. Multiple LC VCOs have been used to cover such wide frequency band. However, the chip area increases due to the increased number of integrated inductors. A general method for achieving both reduced VCO gain(Kvco) and wide frequency band is to use the switched-capacitor bank LC VCO. In this paper, a scheme is proposed to cover the full band using only one VCO. The RF VCO block designed using a 0.18um CMOS process consists of a wideband LC VCO with reduced variation of VCO gain and frequency steps. Buffers, divide-by-2 circuits and control logics the simulation results show that the designed circuit has a phase noise at 100kHz better than -106dBc/Hz throughout the signal band and consumes $9.5{\sim}13mA$ from a 1.8V supply.

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