• Proceedings of the IEEK Conference
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• 2000.06e
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• pp.106-109
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• 2000

The diode characteristics for therapy radiation sensor have been studied by irradiating therapy radiation from the MM22 microtron accelerator. Signal processing has been performed in the pulse mode which can process the signal fast. We have designed integrator, peak detector and synchronization circuit to detect diode signal in the pulse mode for implementation of portal image. We also read the diode signal by A/D board and displayed the peak value with LabView program. Because the quality of portal image obtained by film in the case of therapy radiation is much worse than that of diagnostic film, Digital radiography system by rectifier diode detector was suggested for portal Image.

• Proceedings of the KIEE Conference
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• 2006.04a
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• pp.336-338
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• 2006

One of the important topics concerning the safety of electrical and electronic system is the reliability of the wiring system. The Time-Frequency Domain Reflectometry(TFDR) is a state-of-the-art system for detection and estimation of the fault on a wiring/cable. The purpose of this paper is to implement a Labview based TFDR Real Time system though the instruments of PCI extensions for Instrumentation(PXI). The TFDR Real Time system consists of the five parts: Reference signal design, signal generation, signal acquisition, algorithm execution, results diplay part. In the signal generation and acquisition parts we adopt the Arbitrary Waveform Generator(AWG) and Digital Storage Oscilloscope(DSO) PXI modules which offer commonality, compatibility and easy integration at low cost. And execution of the PXI modules not only is controlled by the Labview programing but also the total system process is executed by the Labview application software.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.11
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• pp.1671-1675
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• 2012

In this paper, we fabricate multi-channel receiver for radar system. This receiver at X-band can be received 8 signal of an identical characteristic, dynamic range has more than 80[dB]. To process direct received signals, this system has the built-in two digital de-modulators which offer the minimum loss on the receiving signal path and has high stability by adding Built-In Test. The gain, noise figure, difference of amplitude and phase on the signal path is respectively $14{\pm}2$[dB], 19[dB], ${\pm}2$[dB], $10^{\circ}$ and below.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2000.11a
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• pp.653-657
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• 2000

The paper describes the contents and results of the national project named "Development of Computer Integrated Product Design for Automation Equipment". It is focussed on the real-time control '||'&'||' monitoring of manufacturing process for automobile rubber parts. Automobile rubber parts industy is one of the typical process that high11 depends upon manufacturing facilities and equipments. So. it requires high cost and engineering technolog) on plant implementation. But most companies of rubber parts industries are small or mid companies that habe weak abilities for plant implementation properly and systematically. Therefore, for upgrading the levelof automation. it is necessar). to dekelope the computer based management and monitoring slsteni that enables to build-up the common base of automation and systemization. 'Through this project. we developed low cost real-time monitoring system for banbun mixing process '||'&'||' mold injection process of rubbcr parts manufacturing, that is composed with DDCU(Distributed Digital Control Unit),signal interfaces to gathering mon~toring terms and speciall\ developed functional sofhare including some algorithm for management '||'&'||' process monitoring

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.5
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• pp.333-340
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• 2003

Doppler processing is the heart of pulsed Doppler radar. It gives a clutter elimination and coherent integration. With the improvement of digital signal processors (DPSs), the implementation using them is more widely used in radar systems. Generally, so as for Doppler processor to process the input data in real time, a parallel processing concept using multiple DSPs should be used. This paper implements a programmable Doppler processor, which consists of MTI filter, DFB and square-law detector, using 8 ADSP21060s. Formulating the distribution time of the input data, the transfer time of the output data and the time required to compute each algorithm, it estimates total processing time and the number of required DSP. Finally, using the TSG that provides radar control pulses and simulated target signals, performances of the implemented Doppler processor are evaluated.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.44 no.2
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• pp.115-123
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• 2021

A lot of sensor and control signals is generated by an industrial controller and related internet-of-things in discrete manufacturing system. The acquired signals are such records indicating whether several process operations have been correctly conducted or not in the system, therefore they are usually composed of binary numbers. For example, once a certain sensor turns on, the corresponding value is changed from 0 to 1, and it means the process is finished the previous operation and ready to conduct next operation. If an actuator starts to move, the corresponding value is changed from 0 to 1 and it indicates the corresponding operation is been conducting. Because traditional fault detection approaches are generally conducted with analog sensor signals and the signals show stationary during normal operation states, it is not simple to identify whether the manufacturing process works properly via conventional fault detection methods. However, digital control signals collected from a programmable logic controller continuously vary during normal process operation in order to show inherent sequence information which indicates the conducting operation tasks. Therefore, in this research, it is proposed to a recurrent neural network-based fault detection approach for considering sequential patterns in normal states of the manufacturing process. Using the constructed long short-term memory based fault detection, it is possible to predict the next control signals and detect faulty states by compared the predicted and real control signals in real-time. We validated and verified the proposed fault detection methods using digital control signals which are collected from a laser marking process, and the method provide good detection performance only using binary values.

• Journal of Broadcast Engineering
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• v.2 no.1
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• pp.8-15
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• 1997

In this paper, a real-time operating Motion Picture Experts Group-1 (MPEG-1) audio encoder system is implemented using a TMS320C31 Digital Signal Processor (DSP) chip. The basic operation of the MPEG-1 audio encoder algorithm based on audio layer-2 and psychoacoustic model-1 is first verified by C-language. It is then realized using the Texas Instruments (Tl) assembly in order to reduce the overall execution time. Finally, the actual BSP circuit board for the encoder system is designed and implemented. In the system, the side-modules such as the analog-to-digital converter (ADC) control, the input/output (I/O) control, the bit-stream transmission from the DSP board to the PC and so on, are utilized with a field programmable gate array (FPGA) using very high speed hardware description language (VHDL) codes. The complete encoder system is able to process the stereo audio signal in real-time at the sampling frequency 48 kHz, and produces the encoded bit-stream with the bit-rate 192 kbps. The real-time operation capability of the encoder system and the good quality of the decoded sound are also confirmed using various types of actual stereo audio signals.

• Proceedings of the IEEK Conference
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• 2009.05a
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• pp.37-39
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• 2009

In the research of speech recognition, locating the beginning and end of a speech utterance in a background of noise is of great importance. Since the background noise presenting to record will introduce disturbance while we just want to get the stationary parameters to represent the corresponding speech section, in particular, a major source of error in automatic recognition system of isolated words is the inaccurate detection of beginning and ending boundaries of test and reference templates, thus we must find potent method to remove the unnecessary regions of a speech signal. The conventional methods for speech endpoint detection are based on two simple time-domain measurements - short-time energy, and short-time zero-crossing rate, which couldn't guarantee the precise results if in the low signal-to-noise ratio environments. This paper proposes a novel approach that finds the Lyapunov exponent of time-domain waveform. This proposed method has no use for obtaining the frequency-domain parameters for endpoint detection process, e.g. Mel-Scale Features, which have been introduced in other paper. Comparing with the conventional methods based on short-time energy and short-time zero-crossing rate, the novel approach based on time-domain Lyapunov Exponents(LEs) is low complexity and suitable for Digital Isolated Word Recognition System.

• Journal of IKEEE
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• v.22 no.2
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• pp.514-517
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• 2018

In sensor systems, ADC (analog-to-digital converter) demands high resolution, low power consumption, and high signal bandwidth. Sigma-delta ADC achieves high resolution by high order structure and high over-sampling ratio, but it suffers from high power consumption and low signal bandwidth. SAR (successive-approximation-register) ADC achieves low power consumption, but there is a limitation to achieve high resolution due to process mismatch. This paper surveys architecture improvement of ADC to overcome these problems.

• Journal of the Institute of Convergence Signal Processing
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• v.12 no.2
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• pp.139-144
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• 2011

The modern digital logic technology does not yet satisfy the speed requirements of real-time DSP circuits due to synchronized operation of multiplication and accumulation. This operation degrades DSP performance. Therefore, the double-base number system (DBNS) has emerged in DSP system as an alternative methodology because of fast multiplication and hardware simplicity. In this paper, authors propose a novel multiplication architecture. One operand is an output of a flash analog-to-digital converter (ADC) in DBNS format, while the other operand is a coefficient in the IEEE standard floating-point number format. The DBNS digital output from ADC is produced through a new double base number encoder (DBNE). The multiplied output is in the format of the IEEE standard floating-point number (FPNS). The proposed circuits process multiplication and conversion together. Compared to a typical multiplier that uses the FPNS, the proposed multiplier also consumes 45% less gates, and 44% faster than the FPNS multiplier on Spartan-3 FPGA board. The design is verified with FIR filter applications.