• Title/Summary/Keyword: digital communications

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A development of DS/CDMA MODEM architecture and its implementation (DS/CDMA 모뎀 구조와 ASIC Chip Set 개발)

  • 김제우;박종현;김석중;심복태;이홍직
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.6
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    • pp.1210-1230
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    • 1997
  • In this paper, we suggest an architecture of DS/CDMA tranceiver composed of one pilot channel used as reference and multiple traffic channels. The pilot channel-an unmodulated PN code-is used as the reference signal for synchronization of PN code and data demondulation. The coherent demodulation architecture is also exploited for the reverse link as well as for the forward link. Here are the characteristics of the suggested DS/CDMA system. First, we suggest an interlaced quadrature spreading(IQS) method. In this method, the PN coe for I-phase 1st channel is used for Q-phase 2nd channels and the PN code for Q-phase 1st channel is used for I-phase 2nd channel, and so on-which is quite different from the eisting spreading schemes of DS/CDMA systems, such as IS-95 digital CDMA cellular or W-CDMA for PCS. By doing IQS spreading, we can drastically reduce the zero crossing rate of the RF signals. Second, we introduce an adaptive threshold setting for the synchronization of PN code, an initial acquistion method that uses a single PN code generator and reduces the acquistion time by a half compared the existing ones, and exploit the state machines to reduce the reacquistion time Third, various kinds of functions, such as automatic frequency control(AFC), automatic level control(ALC), bit-error-rate(BER) estimator, and spectral shaping for reducing the adjacent channel interference, are introduced to improve the system performance. Fourth, we designed and implemented the DS/CDMA MODEM to be used for variable transmission rate applications-from 16Kbps to 1.024Mbps. We developed and confirmed the DS/CDMA MODEM architecture through mathematical analysis and various kind of simulations. The ASIC design was done using VHDL coding and synthesis. To cope with several different kinds of applications, we developed transmitter and receiver ASICs separately. While a single transmitter or receiver ASC contains three channels (one for the pilot and the others for the traffic channels), by combining several transmitter ASICs, we can expand the number of channels up to 64. The ASICs are now under use for implementing a line-of-sight (LOS) radio equipment.

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Development and Research for the Professional Brand of TV Broadcasting Program -By focusing the actually proved study for news program brand- (TV 방송 프로그램의 전문 브랜드 개발 연구 -뉴스 프로그램 브랜드의 실증연구를 중심으로-)

  • Jeong, Bong-Keum;Chang, Dong-Ryun
    • Archives of design research
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    • v.18 no.1 s.59
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    • pp.39-48
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    • 2005
  • In the age of digital culture, TV broadcasting is exercising more influence as a information and communication medium compared to past. With the appearance of satellite broadcasting service in 2002, the broadcasting environment became a diversified field of local TV, cable TV, satellite, internet, etc. and created the time of multi-media and multi-channel. This ongoing change of broadcasting environment made the passive audience of the past, active image makers and new accepters, participants and users of communications, who know how to choose and use media as the active centerpiece, The active acceptor as the centerpiece of channel selections has become the center of the broadcasting, whereby they pick up and enjoy their favorite TV programs and came to remember the list of their favorite channels and zap them finally. In this point of spotting their favorite channels and improving the degree of recognition for the channels, the development of the noticeable brand for a particular program has made a great contribution. The aim of this study, therefore, is to recognize the factors, which are important in the habits of watching TV and to develop professional brands for TV broadcasting programs. The range of the survey for this study was home news programs and broadcasting stations abroad, which were on air from March to May in 2004. The focus of the survey was universal and professional news programs. Through this study, it was ascertained that, in the case of news, developing a brand for an anchor as well as for a professional brand of TV program could be an important element.

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The Accuracy Evaluation according to Dose Delivery Interruption and Restart for Volumetric Modulated Arc Therapy (용적변조회전 방사선치료에서 선량전달의 중단 및 재시작에 따른 정확성 평가)

  • Lee, Dong Hyung;Bae, Sun Myung;Kwak, Jung Won;Kang, Tae Young;Back, Geum Mun
    • The Journal of Korean Society for Radiation Therapy
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    • v.25 no.1
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    • pp.77-85
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    • 2013
  • Purpose: The accurate movement of gantry rotation, collimator and correct application of dose rate are very important to approach the successful performance of Volumetric Modulated Arc Therapy (VMAT), because it is tightly interlocked with a complex treatment plan. The interruption and restart of dose delivery, however, are able to occur on treatment by various factors of a treatment machine and treatment plan. If unexpected problems of a treat machine or a patient interrupt the VMAT, the movement of treatment machine for delivering the remaining dose will be restarted at the start point. In this investigation, We would like to know the effect of interruptions and restart regarding dose delivery at VMAT. Materials and Methods: Treatment plans of 10 patients who had been treated at our center were used to measure and compare the dose distribution of each VMAT after converting to a form of digital image and communications in Medicine (DICOM) with treatment planning system (Eclipse V 10.0, Varian, USA). We selected the 6 MV photon energy of Trilogy (Varian, USA) and used OmniPro I'mRT system (V 1.7b, IBA dosimetry, Germany) to analyze the data that were acquired through this measurement with two types of interruptions four times for each case. The door interlock and the beam-off were used to stop and then to restart the dose delivery of VMAT. The gamma index in OmniPro I'mRT system and T-test in Microsoft Excel 2007 were used to evaluate the result of this investigation. Results: The deviations of average gamma index in cases with door interlock, beam-off and without interruption on VMAT are 0.141, 0.128 and 0.1. The standard deviations of acquired gamma values are 0.099, 0.091, 0.071 and The maximum gamma value in each case is 0.413, 0.379, 0.286, respectively. This analysis has a 95-percent confidence level and the P-value of T-test is under 0.05. Gamma pass rate (3%, 3 mm) is acceptable in all of measurements. Conclusion: As a result, We could make sure that the interruption of this investgation are not enough to seriously affect dose delivery of VMAT by analyzing the measured data. But this investigation did not reflect all cases about interruptions and errors regarding the movement of a gantry rotation, collimator and patient So, We should continuously maintain a treatment machine and program to deliver the accurate dose when we perform the VMAT for the many kinds of cancer patients.

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Design of a Bit-Serial Divider in GF(2$^{m}$ ) for Elliptic Curve Cryptosystem (타원곡선 암호시스템을 위한 GF(2$^{m}$ )상의 비트-시리얼 나눗셈기 설계)

  • 김창훈;홍춘표;김남식;권순학
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.12C
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    • pp.1288-1298
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    • 2002
  • To implement elliptic curve cryptosystem in GF(2$\^$m/) at high speed, a fast divider is required. Although bit-parallel architecture is well suited for high speed division operations, elliptic curve cryptosystem requires large m(at least 163) to support a sufficient security. In other words, since the bit-parallel architecture has an area complexity of 0(m$\^$m/), it is not suited for this application. In this paper, we propose a new serial-in serial-out systolic array for computing division operations in GF(2$\^$m/) using the standard basis representation. Based on a modified version of tile binary extended greatest common divisor algorithm, we obtain a new data dependence graph and design an efficient bit-serial systolic divider. The proposed divider has 0(m) time complexity and 0(m) area complexity. If input data come in continuously, the proposed divider can produce division results at a rate of one per m clock cycles, after an initial delay of 5m-2 cycles. Analysis shows that the proposed divider provides a significant reduction in both chip area and computational delay time compared to previously proposed systolic dividers with the same I/O format. Since the proposed divider can perform division operations at high speed with the reduced chip area, it is well suited for division circuit of elliptic curve cryptosystem. Furthermore, since the proposed architecture does not restrict the choice of irreducible polynomial, and has a unidirectional data flow and regularity, it provides a high flexibility and scalability with respect to the field size m.