• Title/Summary/Keyword: digital PID control

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Fuzzy Logic PID controller based on FPGA

  • Tipsuwanporn, V.;Runghimmawan, T.;Krongratana, V.;Suesut, T.;Jitnaknan, P.
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.1066-1070
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    • 2003
  • Recently technologies have created new principle and theory but the PID control system remains its popularity as the PID controller contains simple structure, including maintenance and parameter adjustment being so simple. Thus, this paper proposes auto tune PID by fuzzy logic controller based on FPGA which to achieve real time and small size circuit board. The digital PID controller design to consist of analog to digital converter which use chip TDA8763AM/3 (10 bit high-speed low power ADC), digital to analog converter which use two chip DAC08 (8 bit digital to analog converters) and fuzzy logic tune digital PID processor embedded on chip FPGA XC2S50-5tq-144. The digital PID processor was designed by fundamental PID equation which architectures including multiplier, adder, subtracter and some other logic gate. The fuzzy logic tune digital PID was designed by look up table (LUT) method which data storage into ROM refer from trial and error process. The digital PID processor verified behavior by the application program ModelSimXE. The result of simulation when input is units step and vary controller gain ($K_p$, $K_i$ and $K_d$) are similarity with theory of PID and maximum execution time is 150 ns/action at frequency are 30 MHz. The fuzzy logic tune digital PID controller based on FPGA was verified by control model of level control system which can control level into model are correctly and rapidly. Finally, this design use small size circuit board and very faster than computer and microcontroller.

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Digital PID controller design adopting the delta transforms ($\delta$ 변환을 채택한 디지틀 PID 제어기 설계)

  • 김인중;홍석민;이상정
    • 제어로봇시스템학회:학술대회논문집
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    • 1992.10a
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    • pp.981-986
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    • 1992
  • In order to implement the digital PID control algorithm, it is necessary to consider the effect of the finite word length(FWL). In this paper, we show the FWL effect in the digital PID controllers. The conception analyse the effects of the signal quantization error in the digital PID algorithm and the coefficient wordlength determined from performance criteria with the statistical wordlength concept. Throughout this paper, it is dealt with the type of controller structure based delta operator the delta operator has such advantages are superior rounfoff noise perfoff noise performance, more accurate coefficient repersentation, and less sensitive control law.

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Design of a Auto-Tuning Digital PID Controller using Relay feedback and Time Delay (시간 지연 릴레이 피드백을 이용한 자동동조 디지털 PID 제어기의 설계)

  • 류경모;박정일
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.109-109
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    • 2000
  • In process industries, more than 90% of the control loops have PID controller. Futhermore, the most control systems are using classical PID controllers for their process control. Various auto-tuning methods of PID gains using relay-feedback are presented recently. In order to get the desired control performance, the correct tuning of PID controller is very important. This paper suggests how to tune of digital PID gains using information for both the Nyquist critical point by conventional method and another point by the relay feedback and hidden time-delay term. Simulation results show that the proposed controller has better performance than the conventional method.

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Digital implementation of PID autotuner (PID 자동동조기의 디지틀 구현)

  • 이상정;김인중;홍석민
    • 제어로봇시스템학회:학술대회논문집
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    • 1991.10a
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    • pp.311-316
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    • 1991
  • This paper deals with designing the PID autotuner. The system parameters are identified using the relay control, where the unidirectional relay with hysteresis is adopted. The digital PID tuning rule on Nyquist plot is derived, and the statistical wordlength is adopted for the coefficient wordlength. The experimental results of temperature control exhibit the satisfactory performance and the validity of the derived statistical wordlength.

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A Study of Improvement on the responsiveness of Digital AVR System (Digital 자동전압조정장치(AVR)의 속응성 향상에 관한 연구)

  • Kim, Song-hyun;Lee, Hyung-ki;Choe, Wook-yeon;An, Young-joo;Kim, Hyun-soo;Kim, Gi-Ryang
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.246-247
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    • 2015
  • Type of Automatic Voltage Regulator (AVR) can be divided into Analog and Digital Type. Automatic Voltage Regulator (AVR) of the synchronous generators of the brushless type are to be reduced to the voltage fluctuation on the basis of the total load. The PID control method is a general control technique is commonly widely used. In this study, the control target parameter iPID does not reset the parameters of the controller for the variable (Intelligent PID) using the controller synchronous generator Digital automatic voltage to you like all applied to the adjusting device (AVR) the voltage change is small, improved responsiveness was studied in this controller.

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Automatic tune parameter for digital PID controller based on FPGA

  • Tipsuwanporn, V.;Jitnaknan, P.;Gulpanich, S.;Numsomran, A.;Runghimmawan, T.
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.1012-1015
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    • 2003
  • Recently technologies have created new principle and theory but the PID control system remains its popularity as the PID controller contains simple structure, including maintenance and parameter adjustment being so simple. The adjust parameter of PID to achieve best response of process which be using time and may be error if user are not expert. Nowadays this problem was solved by develop PID controller which can analysis and auto tune parameter are appropriate with process which used principle of Ziegler ? Nichols but it are expensive and designed for each task. Thus, this paper proposes auto tune PID based on FPGA by use principle of Dahlin which maximum overshoot not over 5 percentages and do not fine tuning again. It have performance in control process are neighboring controller in industrial and simple to use. Especially, It can use various process and low price. The auto tune digital PID processor embedded on chip FPGA XC2S50-5tq-144. The digital PID processor was designed by fundamental PID equation which architectures including multiplier, adder, subtracter and some other logic gate. It was verified by control model of temperature control system.

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Fuzzy PID Controller Design for Tracking Control (퍼지PID제어를 이용한 추종 제어기 설계)

  • 김봉주;정정주
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.68-68
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    • 2000
  • This paper presents a fuzzy modified PID controller that uses linear fuzzy inference method. In this structure, the proportional and derivative gains vary with the output of the system under control. 2-input PD type fuzzy controller is designed to obtain the varying gains. The proposed fuzzy PID structure maintains the same performance as the general-purpose linear PID controller, and enhances the tracking performance over a wide range of input. Numerical simulations and experimental results show the effectiveness of the fuzzy PID controller in comparison with the conventional PID controller.

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Design of fuzzy digital PI+D controller using simplified indirect inference method (간편 간접추론방법을 이용한 퍼지 디지털 PI+D 제어기의 설계)

  • Chai, Chang-Hyun
    • Journal of Institute of Control, Robotics and Systems
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    • v.6 no.1
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    • pp.35-41
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    • 2000
  • This paper describes the design of fuzzy digital PID controller using a simplified indirect inference method. First, the fuzzy digital PID controller is derived from the conventional continuous-time linear digital PID controller,. Then the fuzzification, control-rule base, and defuzzification using SIM in the design of the fuzzy controller are discussed in detail. The resulting controller is a discrete-time fuzzy version of the conventional PID controller, which has the same linear structure, but are nonlinear functions of the input signals. The proposed controller enhances the self-tuning control capability, particularly when the process to be controlled is nonlinear. When the SIIM is applied the fuzzy inference results can be calculated with splitting fuzzy variables into each action component and are determined as the functional form of corresponding variables. So the proposed method has the capability of the high speed inference and adapting with increasing the number of the fuzzy input variables easily. Computer simulation results have demonstrated that the proposed method provides better control performance than the one proposed by D. Misir et al.

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The Measurement of Nano-grating by Scanning Probe Microscopy Using Digital PID Control (Digital PID Control을 적용한 Scanning Probe Microscopy의 Nano-grating 측정)

  • Park, Gyeong-Deok;Ji, Won-Su;Kim, Dae-Chan;Jang, Dong-Hun;O, Beom-Hwan;Park, Se-Geun;Lee, Il-Hang;Lee, Seung-Geol
    • Proceedings of the Optical Society of Korea Conference
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    • 2008.07a
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    • pp.185-186
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    • 2008
  • In this paper, the nano-grating was measured by Scanning Probe Microscopy (SPM) system using digital Proportion, Integration and Derivative (PID) control. Through this measurement, we could confirm the improvement of the vertical resolution compared with analog Proportion and Integration (PI) control method.

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Analysis and Design of a Separate Sampling Adaptive PID Algorithm for Digital DC-DC Converters

  • Chang, Changyuan;Zhao, Xin;Xu, Chunxue;Li, Yuanye;Wu, Cheng'en
    • Journal of Power Electronics
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    • v.16 no.6
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    • pp.2212-2220
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    • 2016
  • Based on the conventional PID algorithm and the adaptive PID (AD-PID) algorithm, a separate sampling adaptive PID (SSA-PID) algorithm is proposed to improve the transient response of digitally controlled DC-DC converters. The SSA-PID algorithm, which can be divided into an oversampled adaptive P (AD-P) control and an adaptive ID (AD-ID) control, adopts a higher sampling frequency for AD-P control and a conventional sampling frequency for AD-ID control. In addition, it can also adaptively adjust the PID parameters (i.e. $K_p$, $K_i$ and $K_d$) based on the system state. Simulation results show that the proposed algorithm has better line transient and load transient responses than the conventional PID and AD-PID algorithms. Compared with the conventional PID and AD-PID algorithms, the experimental results based on a FPGA indicate that the recovery time of the SSA-PID algorithm is reduced by 80% and 67% separately, and that overshoot is decreased by 33% and 12% for a 700mA load step. Moreover, the SSA-PID algorithm can achieve zero overshoot during startup.