• Laser Solutions
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• v.16 no.3
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• pp.27-31
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• 2013

To engrave high-density circuit-line patterns in IC substrates, we applied a projection ablation technique in which a dielectric ($ZrO_2/SiO_2$) mask, a DPSS UV laser instead of an excimer laser, a refractive beam shaping optics and a galvo scanner are used. The line/space dimension of line patterns of the dielectric mask is $10{\mu}m/10{\mu}m$. Using a ${\pi}$ -shaper and a square aperture, the Gaussian beam from the laser is shaped into a square flap-top beam; and a telecentric f-${\theta}$ lens focuses it to a $115{\mu}m{\times}105{\mu}m$ flat-top beam on the mask. The galvo scanner before the f-${\theta}$ lens moves the beam across the scan area of $40mm{\times}40mm$. An 1:1 projection lens was used. Experiments showed that the widths of the engraved patterns in a buildup film ranges from $8.1{\mu}m$ to $10.2{\mu}m$ and the depths from $8.8{\mu}m$ to $11.7{\mu}m$. Results indicates that it is required to increase the projection ratio to enhance profiles of the engraved patterns.

• Laser Solutions
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• v.17 no.3
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• pp.19-23
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• 2014

To directly engrave circuit-line patterns as wide as $6{\mu}m$ in a buildup film to be used as an IC substrate, we applied a projection ablation technique in which an 8 inch dielectric ($ZrO_2/SiO_2$) mask, a DPSS 355nm laser instead of an excimer laser, a ${\pi}$-shaper and a galvo scanner are used. With the ${\pi}$-shaper and a square aperture, the Gaussian beam from the laser is shaped into a square flap-top beam. The galvo scanner before the $f-{\theta}$ lens moves the flat-top beam ($115{\mu}m{\times}105{\mu}m$) across the 8 inch dielectric mask whose patterned area is $120mm{\times}120mm$. Based on the results of the previous research by the authors, the projection ratio was set at 3:1. Experiments showed that the average width and depth of the engraved patterns are $5.41{\mu}m$ and $7.30{\mu}m$, respectively.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1272-1275
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• 2008

We present the development of dry etch process for the liquid crystal display (LCD) fabrication using a dielectric barrier discharge (DBD) system at atmospheric pressure. In this experimental work, the dry etch characteristics and the electrical properties of thin film transistor are evaluated by using the scanning electron microscopy and electric probe, and TFT-LCD panel ($300\;mm\;{\times}\;400\;mm$) is manufactured with the application of the amorphous silicon etch step in the 4 mask and 5 mask processes.

• Korean Journal of Materials Research
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• v.16 no.3
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• pp.151-156
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• 2006

A method for fabrication of nano-scale GaN structure by inductively coupled plasma etching is proposed, exploiting a thermal dewetting of Pt thin film as an etch mask. The nano-scale Pt metal islands were formed by the dewetting of 2-dimensional film on $SiO_2$ dielectric materials during rapid thermal annealing process. For the case of 30 nm thick Pt films, pattern formation and dewetting was initiated at temperatures greater $600^{\circ}C$. Controlling the annealing temperature and time as well as the thickness of the Pt metal film affected the size and density of Pt islands. The activation energy for the formation of Pt metal island was calculated to be 23.2 KJ/mole. The islands show good resistance to dry etching by a $CF_4$ based plasma for dielectric etching indicating that the metal islands produced by dewetting are suitable for use as an etch mask in the fabrication of nano-scale structures.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.770-772
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• 2002

A new dry-processing method of organic gate dielectric film in field-effect transistors (FETs) was proposed. The method use vapor deposition polymerization (VDP) that is continuous and low temperature process. It has the advantages of shadow mask patterning and dry processing in flexible low-cost large area applications. Here, 80 nm-thick Al as a gate electrode was evaporated through shadow mask. Gate insulators used two different polyimides. The one material was 4,4'-oxydiphtahlic anhydride (ODPA) and 4,4'-oxydianiline (ODA). Another was 2,2-bis(3,4-dicarboxyphenyl) Hexafluoropropane Dianhydride (6FDA) and 4,4' -oxydianiline (ODA). These were co-deposited by high-vaccum thermal-evapora and cured at 150 $^{\circ}C$ for 1 hour, respectively. Pentacene as a semiconductor and 100 nm-thick Au as a source and drain electrode were evaporated through shadow mask.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.717-720
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• 2007

We fabricated the 3.5 inch QCIF AMOLED panel with ultra low temperature polycrystalline silicon TFT on the plastic substrate. To reduce the leakage current, we used the triple layered gate metal structure. To reduce the stress from inorganic dielectric layer, we applied the organic interlayer dielectric and the photoactive insulating layer. By using the interlayer dielectric as a capacitor, the mask steps are reduced up to five.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.1030-1033
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• 2004

We herewith report for the effect of dielectric surface modification on the electrical characteristics of organic thin-film transistors (OTFTs). The kist-jm-1 as an organic molecule for the surface modification is deposited onto the surface of zirconium oxide ($ZrO_2$) gate dielectric layer. The OTFTs are elaborated on the flexible plastic substrates through 4-level mask process to yield a simple fabrication process. In this work, we also have examined the dependence of electrical performance on the interface surface state of gate dielectric/pentacene, which may be modified by chemical properties in the gate dielectric surface.

• Proceedings of the KIEE Conference
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• summer
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• pp.518-520
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• 2004

In these days, there is a demand to develop fault current limiters(FCLs) to reduce excessive fault current and protect electrical equipments which are installed in the transmission and distribution power systems. We considered the resistive superconducting FCLs among the various kinds of FCLs. In this study, in order to develop the resistive superconducting FCL of 6.6kV 200A $3\phi$, we designed the new mask pattern for etching YBCO films by means of numerical analysis method, current limiting experiments and visualization of bubbles in films and investigated dielectric performance of the designed mask by using elecrtostatic numerical analysis method and breakdown experiments. We etched YBCO films by using the newly designed mask, connected the etched films in series and in parallel, and designed the 6.6kV resistive SFCL and then we observed the current limiting characteristics of the SFCL.

• Journal of Sensor Science and Technology
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• v.9 no.1
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• pp.9-14
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• 2000

Dielectric characteristics of P(VDF/TrFE) film manufactured using spin coating technique have been investigated. To improve the crystallinity and quality of film, the film was three step annealed. Simple etching process and conditions for P(VDF/TrFE) film were established using top electrode as a mask. Poling is performed by several steps. $1.87\;{\mu}m$ thick P(VDF/TrFE) films were obtained with conditions such that the solution of 10 wt% concentration was spun at 3000rpm for 30 seconds. Before poling, dielectric constant and dielectric loss of P(VDF/TrFE) film were 13.5 and 0.042, respectively. After poling, dielectric constant and dielectric loss of P(VDF/TrFE) film were 11.5 and 0.037, respectively.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2005.09a
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• pp.201-212
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• 2005

[ $Epoxy/BaTiO_3$ ] composite embedded capacitor films (ECFs) were newly designed fur high dielectric constant and low tolerance (less than ${\pm}15\%$) embedded capacitor fabrication for organic substrates. In terms of material formulation, ECFs are composed of specially formulated epoxy resin and latent curing agent, and in terms of coating process, a comma roll coating method is used for uniform film thickness in large area. Dielectric constant of $BaTiO_3\;&\;SrTiO_3$ composite ECF is measured with MIM capacitor at 100 kHz using LCR meter. Dielectric constant of $BaTiO_3$ ECF is bigger than that of $SrTiO_3$ ECF, and it is due to difference of permittivity of $BaTiO_3\;and\;SrTiO_3$ particles. Dielectric constant of $BaTiO_3\;&\;SrTiO_3$ ECF in high frequency range $(0.5\~10GHz)$ is measured using cavity resonance method. In order to estimate dielectric constant, the reflection coefficient is measured with a network analyzer. Dielectric constant is calculated by observing the frequencies of the resonant cavity modes. About both powders, calculated dielectric constants in this frequency range are about 3/4 of the dielectric constants at 1 MHz. This difference is due to the decrease of the dielectric constant of epoxy matrix. For $BaTiO_3$ ECF, there is the dielectric relaxation at $5\~9GHz$. It is due to changing of polarization mode of $BaTiO_3$ powder. In the case of $SrTiO_3$ ECF, there is no relaxation up to 10GHz. Alternative material for embedded capacitor fabrication is $epoxy/BaTiO_3$ composite embedded capacitor paste (ECP). It uses similar materials formulation like ECF and a screen printing method for film coating. The screen printing method has the advantage of forming capacitor partially in desired part. But the screen printing makes surface irregularity during mask peel-off, Surface flatness is significantly improved by adding some additives and by applying pressure during curing. As a result, dielectric layer with improved thickness uniformity is successfully demonstrated. Using $epoxy/BaTiO_3$ composite ECP, dielectric constant of 63 and specific capacitance of 5.1nF/cm2 were achieved.