• Title/Summary/Keyword: device mismatch

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Wafer-Level Packaged MEMS Resonators with a Highly Vacuum-Sensitive Quality Factor

  • Kang, Seok Jin;Moon, Young Soon;Son, Won Ho;Choi, Sie Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.5
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    • pp.632-639
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    • 2014
  • Mechanical stress and the vacuum level are the two main factors dominating the quality factor of a resonator operated in the vacuum range 1 mTorr to 10 Torr. This means that if the quality factor of a resonator is very insensitive to the mechanical stress in the vacuum range, it is sensitive to mainly the ambient vacuum level. In this paper, a wafer-level packaged MEMS resonator with a highly vacuum-sensitive quality factor is presented. The proposed device is characterized by a package with out-of-plane symmetry and a suspending structure with only a single anchor. Out-of-plane symmetry helps prevent deformation of the packaged device due to thermal mismatch, and a single-clamped structure facilitates constraint-free displacement. As a result, the proposed device is very insensitive to mechanical stress and is sensitive to mainly the ambient vacuum level. The average quality factors of the devices packaged under pressures of 50, 100, and 200 mTorr were 4987, 3415, and 2127, respectively. The results demonstrated the high controllability of the quality factor by vacuum adjustment. The mechanical robustness of the quality factor was confirmed by comparing the quality factors before and after high-temperature storage. Furthermore, through more than 50 days of monitoring, the stability of the quality factor was also certified.

5 Axis Picomotor Control for Pixel matching in Holographic Data Storage (홀로그래픽 저장장치의 픽셀 매칭을 위한 5 축 피코모터 제어)

  • Lee Jae-Seung;Choi Jin-Young;Yang Hyun-Seok;Park Young-Pil
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.06a
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    • pp.1099-1102
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    • 2005
  • In this paper, a new visual servo method, which uses 5 axis picomotor to compensate the misalignment generated between a SLM and a CCD in a holographic storage device, was proposed and the effectiveness of it was proved by the experiment. In a holographic storage device, the data processing is done by the SLM and the CCD, and the shape of data is 2 dimensional binary patterns. Therefore, the exact image matching between the SLM and the CCD is very important, and the mismatching of it causes the errors in the data reconstruction. First, the brief introduction of a holographic data storage is given, then, BER concept which is errors caused by pixel mismatch between the SLM and the CCD is defined. Second, the geometric relation between 5 axis picomotor and the CCD movement is studied. Finally, the visual servo method using 5 axis picomotor to reduce the BER in a holographic storage device is proposed and experimented. From the experiment, we find that about 3% BER improvement is obtained by the proposed method.

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A Design of Full Flash 8-Bit CMOS A/D Converter (Full Flash 8-Bit CMOS A/D 변환기 설계)

  • Choi, Young-Gyu;Yi, Cheon-Hee
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.11
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    • pp.126-134
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    • 1990
  • In order to implement high-speed data acquistion system in CMOS VLSI technology, means must be found to overcome the relatively low transconductance and large device mismatch characteristic of MOS device. Because of these device limitations, circuit design approaches tradition-ally used in high-speed bipolar analog-to-digital converter(ADC) are suited to CMOS implementation. Also the design of VLSI CMOS comparator wherein voltage comparision is accomplished by means of a pipelined cascade RSA (Regenerative Sense Amplifier). So, in this paper we designed the A/D converter incorporates the pipelined CMOS comparator.

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EFFECTS OF PROCESS INDUCED DEFECTS ON THERMAL PERFORMANCE OF FLIP CHIP PACKAGE

  • Park, Joohyuk;Sham, Man-Lung
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2002.11a
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    • pp.39-47
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    • 2002
  • Heat is always the root of stress acting upon the electronic package, regardless of the heat due to the device itself during operation or working under the adverse environment. Due to the significant mismatch in coefficient of thermal expansion (CTE) and the thermal conductivity (K) of the packaging components, on one hand intensive research has been conducted in order to enhance the device reliability by minimizing the mechanical stressing and deformation within the package. On the other hand the effectiveness of different thermal enhancements are pursued to dissipate the heat to avoid the overheating of the device. However, the interactions between the thermal-mechanical loading has not yet been address fully. in articular when the temperature gradient is considered within the package. To address the interactions between the thermal loading upon the mechanical stressing condition. coupled-field analysis is performed to account the interaction between the thermal and mechanical stress distribution. Furthermore, process induced defects are also incorporated into the analysis to determine the effects on thermal conducting path as well as the mechanical stress distribution. It is concluded that it feasible to consider the thermal gradient within the package accompanied with the mechanical analysis, and the subsequent effects of the inherent defects on the overall structural integrity of the package are discussed.

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A Novel Calibration Method Research of the Scale Factor for the All-optical Atomic Spin Inertial Measurement Device

  • Zou, Sheng;Zhang, Hong;Chen, Xi-yuan;Chen, Yao;Fang, Jian-cheng
    • Journal of the Optical Society of Korea
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    • v.19 no.4
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    • pp.415-420
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    • 2015
  • A novel method to measure the scale factor for the all-optical atomic spin inertial measurement device (ASIMD) is demonstrated in this paper. The method can realize the calibration of the scale factor by a self-consistent method with small errors in the quiescent state. At first, the matured IMU (inertial measurement unit) device was fixed on an optical platform together with the ASIMD, and it has been used to calibrate the scale factor for the ASIMD. The results show that there were some errors causing the inaccuracy of the experiment. By the comparative analysis of theory and experiment, the ASIMD was unable to keep pace with the IMU. Considering the characteristics of the ASIMD, the mismatch between the driven frequency of the optical platform and the bandwidth of the ASIMD was the major reason. An all-optical atomic spin magnetometer was set up at first. The sensitivity of the magnetometer is ultra-high, and it can be used to detect the magnetization of spin-polarized noble gas. The gyromagnetic ratio of the noble gas is a physical constant, and it has already been measured accurately. So a novel calibration method for scale factor based on the gyromagnetic ratio has been presented. The relevant theoretical analysis and experiments have been implemented. The results showed that the scale factor of the device was $7.272V/^{\circ}/s$ by multi-group experiments with the maximum error value 0.49%.

Effects of Package Induced Stress on MEMS Device and Its Improvements (패키징으로 인한 응력이 MEMS 소자에 미치는 영향 분석 및 개선)

  • Choa Sung-Hoon;Cho Yong Chul;Lee Moon Chul
    • Journal of the Korean Society for Precision Engineering
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    • v.22 no.11 s.176
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    • pp.165-172
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    • 2005
  • In MEMS (Micro-Electro-Mechanical System), packaging induced stress or stress induced structure deformation becomes increasing concerns since it directly affects the performance of the device. In the decoupled vibratory MEMS gyroscope, the main factor that determines the yield rate is the frequency difference between the sensing and driving modes. The gyroscope, packaged using the anodic bonding at the wafer level and EMC (epoxy molding compound) molding, has a deformation of MEMS structure caused by thermal expansion mismatch. This effect results in large distribution in the frequency difference, and thereby a lower yield rate. To improve the yield rate we propose a packaged SiOG (Silicon On Glass) process technology. It uses a silicon wafer and two glass wafers to minimize the wafer warpage. Thus the warpage of the wafer is greatly reduced and the frequency difference is more uniformly distributed. In addition. in order to increase robustness of the structure against deformation caused by EMC molding, a 'crab-leg' type spring is replaced with a semi-folded spring. The results show that the frequency shift is greatly reduced after applying the semi-folded spring. Therefore we can achieve a more robust vibratory MEMS gyroscope with a higher yield rate.

A Study on the Affected of DC-Link Voltage Balance Control of the Vienna Rectifier Linked With the Input Series Output Parallel LLC Converter (직렬 입력 병렬 출력 연결된 LLC 컨버터를 갖는 비엔나 정류기의 DC 링크 전압 평형 제어에 관한 연구)

  • Baek, Seung-Woo;Kim, Hag-Wone;Cho, Kwan-Yuhl
    • The Transactions of the Korean Institute of Power Electronics
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    • v.26 no.3
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    • pp.205-213
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    • 2021
  • Due to the advantage of reducing the voltage applied to the switch semiconductor, the input series and output parallel combination is widely used in systems with high input voltage and large output current. On the other hand, the LLC converter is widely used as a high-efficiency power converter, and when connected by ISOP combination, there is a possibility that input voltage imbalance may occur due to a mismatch of passive devices. To avoid damaging the switching device, this study analyzed the DC-link voltage imbalance of a high-capacity supply using an ISOP LLC converter. In addition, the case where DC-link unbalance control was applied and the case not applied was analyzed respectively. Based on this analysis, an initial start-up algorithm was proposed to prevent input power semiconductor device damage due to DC-link over-voltage. The effectiveness of the proposed algorithm has been verified through simulations and experiments.

SI-BASED MAGNETIC TUNNELING TRANSISTOR WITH HIGH TRANSFER RATIO

  • S. H. Jang;Lee, J. H.;T. Kang;Kim, K. Y.
    • Proceedings of the Korean Magnestics Society Conference
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    • 2003.06a
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    • pp.24-24
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    • 2003
  • Metallic magnetoelectronic devices have studied intensively and extensively for last decade because of the scientific interest as well as great technological importance. Recently, the scientific activity in spintronics field is extending to the hybrid devices using ferromagnetic/semiconductor heterostructures and to new ferromagnetic semiconductor materials for future devices. In case of the hybrid device, conductivity mismatch problem for metal/semiconductor interface will be able to circumvent when the device operates in ballistic regime. In this respect, spin-valve transistor, first reported by Monsma, is based on spin dependent transport of hot electrons rather than electron near the Fermi energy. Although the spin-valve transistor showed large magnetocurrent ratio more than 300%, but low transfer ratio of the order of 10$\^$-5/ prevents the potential applications. In order to enhance the collector current, we have prepared magnetic tunneling transistor (MTT) with single ferromagnetic base on Si(100) collector by magnetron sputtering process. We have changed the resistance of tunneling emitter and the thickness of baser layer in the MTT structure to increase collector current. The high transfer ratio of 10$\^$-4/ range at bias voltage of more than 1.8 V, collector current of near l ${\mu}$A, and magnetocurrent ratio or 55% in Si-based MTT are obtained at 77K. These results suggest a promising candidate for future spintronic applications.

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A Simple Static Noise Margin Model of MOS CML Gate in CMOS Processes

  • Jeong, Hocheol;Kang, Jaehyun;Lee, Kang-Yoon;Lee, Minjae
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.3
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    • pp.370-377
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    • 2017
  • This paper presents a simple noise margin (NM) model of MOS current mode logic (MCML) gates especially in CMOS processes where a large device mismatch deteriorates logic reliability. Trade-offs between speed and logic reliability are discussed, and a simple yet accurate NM equation to capture process-dependent degradation is proposed. The proposed NM equation is verified for 130-nm, 110-nm, 65-nm, and 40-nm CMOS processes and has errors less than 4% for all cases.

Thermal Fatigue Reliability of Solder Joints in a Thin Film Optical Filter Device (박막 광학 필터 디바이스의 패키징시 솔더 조인트의 피로 신뢰성 해석)

  • Lee, Sung-Chul;Hyun, Chung-Min;Lee, Hyung-Man;Kim, Myoung-Jin;Kim, Hwe-Kyung;Kim, Ki-Tae
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.28 no.6
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    • pp.677-684
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    • 2004
  • Plastic and creep deformations of solder joints during thermal cycling are the main factors of misalignments and power losses in optical telecommunication components. Furthermore, the increased mismatch between solder Joint-bonded areas may cause severe failure in the components. Darveaux's creep model was implemented into a finite element program (ABAQUS) to simulate creep response of solder. Based on the finite element results, thermal fatigue reliability was predicted by using various fatigue life prediction models. Also, the effects of ramp conditions, dwelling time, and solder joint-embedding materials on the reliability were investigated under the thermal cycling conditions of the Telcordia schedule (-40∼75$^{\circ}C$).