• Proceedings of the KIEE Conference
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• 1991.07a
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• pp.861-865
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• 1991

Sigma delta modulation has been the preferred technique for oversampling conversion. In this paper we present the basic principles of oversampled sigma-delta Converters. Basic operation and theory behind sigma-delta modulation is reviewed. The different structures of the sigma-delta converters are described and the concepts of designing modulators and digital filters are discussed. The latest designs are also reviewed.

• ETRI Journal
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• v.31 no.4
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• pp.393-398
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• 2009

The operation of a first-order 2-bit adaptive sigma-delta modulation system is described and discussed in this paper. The system operation is based on the combination of both "memory" and "look-ahead" estimation in the employed step-size adaptation algorithm of the basic quantizer. In comparison to simple systems and other adaptive sigma-delta systems, computer simulation results show that these features of the described system are responsible for the high SNR values and the extended dynamic range achieved for AC signals as well as the noise power reduction of almost 10 dB and the complete elimination of the idle tones for DC signals. However, such an advantageous performance requires the least possible multiplicative error accumulation, and this cannot be achieved without analog circuits of the highest possible accuracy.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.1
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• pp.54-61
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• 2009

This paper proposes the 2nd-order SDSDM (Space Dithered Sigma-Delta Modulation) for performance improvement of a buck converter. The PWM (Pulse Width Modulation) has a drawback in that power spectrum tends to be concentrated around the switching frequency. The resulting harmonic spikes cause a EMI(Electromagnetic Interference) and switching loss in semiconductor, etc. The 1st-order SDSDM scheme is a kind of DSDM for reducing these harmonic spikes. In this scheme, a switching frequency is spread through random dither generator placed on input part. In experimental result, the proposed 2nd-order SDSDM is confirmed by applying to a buck converter.

• Proceedings of the KIEE Conference
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• 2000.07b
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• pp.1321-1323
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• 2000

Sigma-delta modulation can perform A/D conversion with a high-resolution. It is useful for simplifing the system and spreading out inband signal noise. When the sigma-delta modulation is applied to a switching converter, it can suppress the harmonic frequencies of output signal and be realized with a simple structure. In this paper, some methods of sigma-delta modulation are discussed so as to find the suitable structure for a switching converter. Noise characteristics are calculated and analyzed through simulations.

• Journal of Power Electronics
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• v.9 no.5
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• pp.667-678
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• 2009

The PWM (Pulse Width Modulation) control signals have a drawback in that their power spectrum tends to be concentrated around the switching frequency and the resulting harmonic spikes cause an EMI (Electromagnetic Interference) and switching losses in semiconductors, etc. The SDM (Sigma-Delta Modulation) is a type of switching modulation used to reduce these harmonic spikes, and several SDM schemes are investigated in this paper. In the DSDM (Dithered SDM), the SDSDM (Space-Dithered SDM) and TDSDM (Time-Dithered SDM), the signals are classified by the location of their random dither additions. In these schemes, the switching frequency is spread by a random dither generator placed on the input or the output parts. Experimental results are presented where the advantages of the new proposed CDSDM (Combined Dithered SDM) are confirmed by applying to a buck converter.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.494-497
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• 2002

Conducted electromagnetic interference (EMI) from switch mode power supplies (SMPS) has become a major problem due to the proliferation of these devices employing dc-dc converters using standard pulse width modulation (PWM). In this paper, we proposed the sigma-delta modulation $({\sum}{\Delta}M)$ as an alternative switching technique to reduce the conducted EMI in SMPS. A comparative investigation on conducted EMI generated by PWM and ${\sum}{\Delta}M$ techniques are experimentally performed on a 300W Boost converter.

• ETRI Journal
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• v.30 no.3
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• pp.377-382
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• 2008

A novel power amplifier for a polar transmitter is proposed to achieve better spectral performance for a wideband envelope signal. In the proposed scheme, 2-bit sigma-delta (${\Sigma}{\Delta}$) modulation of the envelope signal is introduced, and the power amplifier configuration is modified in a binary form to accommodate the 2-bit digitized envelope signals. The 2-bit ${\Sigma}{\Delta}$ modulator lowers the noise of the envelope signal by fine quantization and thus enhances the spectral property of the RF signal. The Ptolemy simulation results of the proposed structure show that the spectral noise is reduced by 10 dB in a full transmit band of the EDGE system. The dynamic range is also enhanced. Since the performance is improved without increasing the over-sampling ratio, this technique is best suited for wireless communication with high data rates.

• Proceedings of the IEEK Conference
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• 2000.06e
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• pp.81-84
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• 2000

This paper proposes a new sigma delta modulator structure based on a LMS(Least Mean Square) algorithm that minimizes the quantization noise. The proposed architecture provides 40dB SNR improvement and 35dB wider dynamic range over conventional sigma delta modulation. The proposed architecture provides superior performance especially when the input signal is small.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.10
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• pp.513-519
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• 2001

This paper proposed a random sigma-delta modulator(RSDM), which is constructed by a 1st order sigma-delta modulator(SDM) and a simple structured random binary generator(RBG). The 1st order SDM produces a switching pulse waveform which has the same low-frequency component as the reference input, while the RBG spreads the distribution of the number of sampling per switching cycle, and thus disperses the spectrum spikes in the output. The relationship between the harmonic spectra and the number of sampling per switching cycle is studied through computer simulations, and the frequency spectra of the RSDM are confirmed in an experimental setup.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.2
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• pp.170-183
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• 2013

This paper gives an overview of fractional-N phase-locked loops (PLLs) with practical design perspectives focusing on a ${\Delta}{\Sigma}$ modulation technique and a finite-impulse response (FIR) filtering method. Spur generation and nonlinearity issues in the ${\Delta}{\Sigma}$ fractional-N PLLs are discussed with simulation and hardware results. High-order ${\Delta}{\Sigma}$ modulation with FIR-embedded filtering is considered for low noise frequency generation. Also, various architectures of finite-modulo fractional-N PLLs are reviewed for alternative low cost design, and the FIR filtering technique is shown to be useful for spur reduction in the finite-modulo fractional-N PLL design.