• Title/Summary/Keyword: decoupling capacitor

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Power Decoupling of Single-phase DC/AC inverter using Dual Half Bridge Converter (듀얼 하프브리지 컨버터를 사용하는 파워 디커플링 DC/AC 인버터)

  • Irfan, Mohammad Sameer;Ahmed, Ashraf;Park, Joung-hu
    • Proceedings of the KIPE Conference
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    • 2015.07a
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    • pp.421-422
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    • 2015
  • Nowadays, bidirectional DC-DC converters are becoming more into picture for different applications especially electric vehicles. There are many bidirectional DC-DC converters topologies; however, voltage-fed Dual Half-Bridge (DHB) topology has less number of switches as compared to other isolated bidirectional DC-DC converters. Furthermore, voltage fed DHB has galvanic isolation, high power density, reduced size, high efficiency and hence cost effective. Electrolytic capacitors always have problem regarding size and reliability in DC-AC single phase inverters. Therefore, voltage-fed DHB converter is proposed for the purpose of power decoupling to replace electrolytic capacitor by film capacitors. A new control strategy has been developed for 120Hz ripple rejection, and it was verified by simulation.

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Stability Analysis of FCHEV Energy System Using Frequency Decoupling Control Method

  • Dai, Peng;Sun, Weinan;Xie, Houqing;Lv, Yan;Han, Zhonghui
    • Journal of Power Electronics
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    • v.17 no.2
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    • pp.490-500
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    • 2017
  • Fuel cell (FC) is a promising power supply in electric vehicles (EV); however, it has poor dynamic performance and short service life. To address these shortcomings, a super capacitor (SC) is adopted as an auxiliary power supply. In this study, the frequency decoupling control method is used in electric vehicle energy system. High-frequency and low-frequency demand power is provided by SC and FC, respectively, which makes full use of two power supplies. Simultaneously, the energy system still has rapidity and reliability. The distributed power system (DPS) of EV requires DC-DC converters to achieve the desired voltage. The stability of cascaded converters must be assessed. Impedance-based methods are effective in the stability analysis of DPS. In this study, closed-loop impedances of interleaved half-bridge DC-DC converter and phase-shifted full-bridge DC-DC converter based on the frequency decoupling control method are derived. The closed-loop impedance of an inverter for permanent magnet synchronous motor based on space vector modulation control method is also derived. An improved Middlebrook criterion is used to assess and adjust the stability of the energy system. A theoretical analysis and simulation test are provided to demonstrate the feasibility of the energy management system and the control method.

Double Boost Power-Decoupling Topology Suitable for Low-Voltage Photovoltaic Residential Applications Using Sliding-Mode Impedance-Shaping Controller

  • Tawfik, Mohamed Atef;Ahmed, Ashraf;Park, Joung-Hu
    • Journal of Power Electronics
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    • v.19 no.4
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    • pp.881-893
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    • 2019
  • This paper proposes a practical sliding-mode controller design for shaping the impedances of cascaded boost-converter power decoupling circuits for reducing the second order harmonic ripple in photovoltaic (PV) current. The cascaded double-boost converter, when used as power decoupling circuit, has some advantages in terms of a high step-up voltage-ratio, a small number of switches and a better efficiency when compared to conventional topologies. From these features, it can be seen that this topology is suitable for residential (PV) rooftop systems. However, a robust controller design capable of rejecting double frequency inverter ripple from passing to the (PV) source is a challenge. The design constraints are related to the principle of the impedance-shaping technique to maximize the output impedance of the input-side boost converter, to block the double frequency PV current ripple component, and to prevent it from passing to the source without degrading the system dynamic responses. The design has a small recovery time in the presence of transients with a low overshoot or undershoot. Moreover, the proposed controller ensures that the ripple component swings freely within a voltage-gap between the (PV) and the DC-link voltages by the small capacitance of the auxiliary DC-link for electrolytic-capacitor elimination. The second boost controls the main DC-link voltage tightly within a satisfactory ripple range. The inverter controller performs maximum power point tracking (MPPT) for the input voltage source using ripple correlation control (RCC). The robustness of the proposed control was verified by varying system parameters under different load conditions. Finally, the proposed controller was verified by simulation and experimental results.

Design of a Virtual d-q Current Controller for Capacitor-split-type Active Power Decoupling Circuits (커패시터-분할타입 능동전력디커플링회로를 위한 가상 d-q 전류제어기 설계)

  • Kim, Dong-Hee;Oh, Won-Hyun;Park, Sung-Min
    • Proceedings of the KIPE Conference
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    • 2020.08a
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    • pp.357-358
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    • 2020
  • 본 논문에서는 커패시터-분할타입 능동전력디커플링 회로를 위한 가상 d-q전류 제어기 설계방법을 제안한다. 설계한 제어기의 주파수 특성을 분석하고 MATLAB/Simulink 시뮬레이션을 통해 검증한다.

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A Characteristic Analysis of DC-DC Converter linked LCC type High Frequency Resonant Inverter (LCC형 고주파 공진 인버터 링크 DC-DC 컨버터의 특성해석)

  • Nam, Seung-Sik;Ro, Chae-Gyun;Lee, Dal-Hae;Seo, Cheol-Sik;Hwang, Gye-Ho
    • Proceedings of the KIEE Conference
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    • 1997.07f
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    • pp.2007-2009
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    • 1997
  • This paper proposes the LCC type high frequency resonant DC-DC converter using Power MOSFET as switching devices, and describes the characteristics and operating principles. LCC converter has the resonant capacitor instead of a source decoupling capacitor in the conventional half bridge parallel resonant converter. We performed an experiment to prove the propriety of proposed converter.

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A Performance Comparison of the Current Feedback Schemes with a New Single Current Sensor Technique for Single-Phase Full-Bridge Inverters

  • Choe, Jung-Muk;Lee, Young-Jin;Cho, Younghoon;Choe, Gyu-Ha
    • Journal of Power Electronics
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    • v.16 no.2
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    • pp.621-630
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    • 2016
  • In this paper, a single current sensor technique (SCST) is proposed for single-phase full-bridge inverters. The proposed SCST measures the currents of multiple branches at the same time, and reconstructs the average inductor, capacitor, and load current in a single switching cycle. Since all of the branches' current in the LC filter and the load are obtained using the SCST, both the inductor and the capacitor current feedback schemes can be selectively applied while taking advantages of each other. This paper also analyzes both of the current feedback schemes from the view point of the closed-loop output impedance. The proposed SCST and the analysis in this paper are verified through experiments on a 3kVA single-phase uninterruptible power supply (UPS).

A PWM Phase-Shift Circuit using an RC Delay for Multiple LED Driver ICs

  • Oh, Jae-Mun;Kang, Hyeong-Ju;Yang, Byung-Do
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.4
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    • pp.484-492
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    • 2015
  • This paper proposes a PWM phase-shift circuit to make that the LED lighting system distributes the channel currents evenly for any number of LED strings by generating evenly phase-shifted PWM signals for multiple LED driver ICs. The evenly distributed channel currents reduce the peak current, the decoupling capacitor size, and EMI noise. The PWM phase-shift circuit makes an arbitrary degree of PWM phase-shift by using a resistor and a capacitor. It measures the RC delay once. It reduces the number of external resistors and capacitors by providing zero and 180 degree phase-shift modes requiring no resistor and capacitor. An LED driver IC with the PWM phase-shift circuit was fabricated with a $0.35{\mu}m$ BCDMOS process. The PWM phase-shift circuit receives a PWM signal of 50 Hz~20 kHz at $f_{CLK}=450kHz$ and it generates a $0{\sim}360^{\circ}$ phase-shifted PWM signal with $R=0{\sim}1.1M{\Omega}$ at C=1 nF and $f_{PWM}=1kHz$. The measured phase errors are 1.74~3.94% due to parasitic capacitances.

A 1.8V 50-MS/s 10-bit 0.18-um CMOS Pipelined ADC without SHA

  • Uh, Ji-Hun;Kim, Won-Myung;Kim, Sang-Hun;Jang, Young-Chan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.05a
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    • pp.143-146
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    • 2011
  • A 50-MS/s 10-bit pipelined ADC with 1.2Vpp differential input range is proposed in this paper. The designed pipelined ADC consists of eight stage of 1.5bit/stage, one stage of 2bit/stage, digital error correction block, bias & reference driver, and clock generator. 1.5bit/stage is consists of sub-ADC, DAC and gain stage, Specially, a sample-and hold amplifier (SHA) is removed in the designed pipelined ADC to reduce the hardware and power consumption. Also, the proposed bootstrapped switch improves the Linearity of the input analog switch and the dynamic performance of the total ADC. The reference voltage was driven by using the on-chip reference driver without external reference. The proposed pipelined ADC was designed by using a 0.18um 1-poly 5-metal CMOS process with 1.8V supply. The total area including the power decoupling capacitor and power consumption are $0.95mm^2$ and 60mW, respectively. Also, the simulation result shows the ENOB of 9.3-bit at the Nyquist sampling rate.

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The Research On the Energy Storage System Using SuperCapacitor (슈퍼커패시터를 적용한 에너지 저장시스템 설계에 관한 연구)

  • Kim, IL-Song
    • Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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    • v.8 no.11
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    • pp.215-222
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    • 2018
  • In this paper, the research on the energy storage system adapting super-capacitor has been performed. The most advanced features compared to the conventional lead-acid battery systems is that it can obtain high power capability due to the super capacitor power characteristics. The suggested system can attain high power in short times and achieve high power quality improvements. The application areas are power quality improvement system, motor start power which requires high power during transient times. The energy conversion system consists of bi-directional converter and inverter and advantages of high speed, high power charging and discharging performances. The design steps for the two loop controller of the bi-directional inverter are suggested and verified by the experiment and manufacturing. The two loop controller design starts from linearized transfer function which is calculated from the state averaging model including state decoupling method. The current controller requirements are 20% overshoot and settling time and voltage controller are no overshoot and settling time which is 10 times longer than current controller. The design is verified from the step input response. The designed controllers have unity power factor characteristics and thus can improve the power quality of the grid. It also has fast response time and zero steady state error.

Partial EBG Structure with DeCap for Ultra-wideband Suppression of Simultaneous Switching Noise in a High-Speed System

  • Kwon, Jong-Hwa;Kwak, Sang-Il;Sim, Dong-Uk;Yook, Jong-Gwan
    • ETRI Journal
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    • v.32 no.2
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    • pp.265-272
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    • 2010
  • To supply a power distribution network with stable power in a high-speed mixed mode system, simultaneous switching noise caused at the multilayer PCB and package structures needs to be sufficiently suppressed. The uni-planar compact electromagnetic bandgap (UC-EBG) structure is well known as a promising solution to suppress the power noise and isolate noise-sensitive analog/RF circuits from a noisy digital circuit. However, a typical UC-EBG structure has several severe problems, such as a limitation in the stop band's lower cutoff frequency and signal quality degradation. To make up for the defects of a conventional EBG structure, a partially located EBG structure with decoupling capacitors is proposed in this paper as a means of both suppressing the power noise propagation and minimizing the effects of the perforated reference plane on the signal quality. The proposed structure is validated and investigated through simulation and measurement in both frequency and time domains.