• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.7
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• pp.730-735
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• 2004

This paper describes what brings about DC offset and the impact or the DC offset on the performance or direct-conversion mobile receiver in WCDMA system. The performance degradation of $E_{b}/N_{o}$ due to the DC offset is presented through simulation result. Direct-conversion RF Transceiver which has the function of DC offset control is implemented and then applied to the WCDMA test-bed for the performance evaluation. The receiver performance degradation of $E_{c}/I_{o}$ is evaluated and analyzed by varying DC offset value. The practical test showed the minimum requirement of DC offset value to meet system performance.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.4
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• pp.668-675
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• 2001

Recently, the performance of the commercial PCS(Personal Communication Service) system has been improved to the uppermost limit and ultimately the next generation mobile communication is to be realized by IMT-2000 (International Mobile Communication-2000) to provide multimedia services. Therefore, the new type receiving system is researched actively and one of the most important part in a receiver is direct conversion method. The direct conversion method is suitable for low power consumption, small size, MMIC, and low price, which is to be adopted to the next generation mobile communication systems. In this case, however, several problems occur due to DC-offset. The DC-offset suppresses amplification of the required signal because of the leakage signal of frequency synthesizer in the system. In this thesis, the removing method of DC-offset was considered. There are four removing techniques of DC-offset, which are AC-coupling, large capacitor, DC-feedback loop, and DC-free coding. Among these, the AC-coupling method is the most simplest method and the DC-feedback loop method has the best performance. Then, the performance of the AC-coupling method and DC-feedback loop method are evaluated by HP's ADS simulation tool. As a result, the AC-coupling method cannot be used to the digital communication systems due to data loss. On the other hand, it was confirmed that the DC-feedback loop method is suitable for the direct conversion receiver.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.62 no.1
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• pp.12-17
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• 2013

Fault currents are expressed as a combination of harmonic components and exponentially decaying DC offset components, during the occurrence of fault in power system. The DC offset components are included, when the voltage phase angle of fault inception is closer to $0^{\circ}$ or $180^{\circ}$. The digital protection relay should be detected quickly and accurately during the faults, despite of the distortions of relaying signal by these components. It is very important to implement the robust protection algorithm, that is not affected by DC offset and harmonic components, because most relaying algorithms extract the fundamental frequency component from distorted relaying signal. So, In order to high performance in relaying, advanced DC offset removal filter is required. In this paper, a new DC offset removal filter, which is no need to preset a time constant of power system and accurately estimate the DC offset components with one cycle of data, is proposed, and compared with the other filter. In order to verify performance of the filter, we used collecting the current signals after synchronous machine modeling by ATPDraw5.7p4 software. The results of simulation, the proposed DC offset removal filter do not need any prior information, the phase delay and gain error were not occurred.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.6
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• pp.955-961
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• 2016

Fault location estimation is an important element for rapid recovery of power system when fault occur in transmission line. In order to calculate line impedance, most of fault location algorithm uses by measuring relaying waveform using DFT. So if there is a calculation error due to the influence of phasor by DC offset component, due to large vibration by line impedance computation, abnormal and non-operation of fault locator can be issue. It is very important to implement the robust fault location algorithm that is not affected by DC offset component. This paper describes an enhanced fault location algorithm based on the DC offset elimination filter to minimize the effects of DC offset on a long transmission line. The proposed DC offset elimination filter has not need any erstwhile information. The phase angle delay of the proposed DC offset filter did not occurred and the gain error was not found. The enhanced fault location algorithm uses DFT filter as well as the proposed DC offset filter. The behavior of the proposed fault location algorithm using off-line simulation has been verified by data about several fault conditions generated by the ATP simulation program.

• Journal of the Korean Solar Energy Society
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• v.32 no.spc3
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• pp.255-261
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• 2012

Since PV PCS uses output current sensor for ac output current control, the sensor's sensing value includes unnecessary offset inevitably. If PV inverter is controlled by the included offset value, it's output current will generate DC offset. The DC offset of output current for trans-less PV inverter is fatal to grid, which results in saturating grid side transformer. Usually DSP controller of PV inverter reads several times sensing value during initial operation and, finally, it's average value is used for offset calibration. However, if temperature changes, the offset changes, too. And also, the switch device is not ideal, both each switching element of the voltage drop difference and on & off time delay difference generate DC offset. Thus, to compensate for deadtime and the switch voltage drop, feedback control by output current DC offset should be provided to compensate additional distortion of the output current. The validity of the proposed method is confirmed through PSIM simulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.10 s.352
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• pp.97-103
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• 2006

This paper presents the method of improving second order intermodulation distortion(IMD2) and dc-offset problems in down-conversion mixer. A simple analysis reveals the IMD2 and dc-offset can be eliminated by controlling the duty cycles of local oscillator(LO) inputs. A mixer with the proposed method has been simulated with a $0.13{\mu}m$ RF CMOS technology with 5% mismatch in the load resistance, the mixer shows 2.04dBm IIP2 and 22mnV input referred DC-offset. By controlling two duty cycles of LO inputs, IIP2 and DC-offset can be improved to 38.8dBm and $777{\mu}V$, respectively.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.7
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• pp.1005-1011
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• 2015

This paper proposes the DC offset compensation algorithm with fast response to the sensed grid voltage in the single-phase grid connected inverter. If the sensor of the grid voltage has problems, the DC offset of the grid voltage can be generated. This error must be resolved because the DC offset can generate the estimated grid frequency error of the phase-locked loop (PLL). In conventional algorithm to compensate the DC offset, the DC offset is estimated by integrating the synchronous reference frame d-axis voltage during one period of the grid voltage. The conventional algorithm has a drawback that is a slow dynamic response because monitoring the one period of the grid voltage is required. the proposed algorithm has fast dynamic response because the DC offset is consecutively estimated by transforming the d-axis voltage to synchronous reference frame without monitoring one cycle time of the grid voltage. The proposed algorithm is verified from PSIM simulation and the experiment.

• Journal of the Korean Solar Energy Society
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• v.33 no.6
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• pp.92-97
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• 2013

This paper proposes DC offset current compensation method of transformerless fuel cell/PV PCS. DC offset current is generated by the unbalanced internal resistance of the switching devices in full bridge topology. The other cause is the sensitivity of the current sensor, which is lower than DSP in resolution. If power converter system has these causes, the AC output current in the inverter will generate the DC offset. In case of transformerless grid-connected inverter system, DC offset current is fatal to grid-side, which results in saturating grid side transformer. Several simulation results show the difficulties of detecting DC offset current. Detecting DC offset current method consists of the differential amplifiers and PWM is compensated by the output of the Op amp circuit with integrator controller. PSIM simulation verifies that the proposed method is simpler and more effective than using low resolution current sensor alone.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.64 no.2
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• pp.67-73
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• 2015

Distance relay is widely used for the protection of long transmission line. Most of distance relay used to calculate line impedance by measuring voltage and current using DFT. So if there is a computation error due to the influence of phasor by DC offset component, due to excessive vibration by measuring line impedance, overreach or underreach can be occurs, and then abnormal and non-operation of distance relay can be issue. It is very important to implement the robust distance relaying that is not affected by DC offset component. This paper describes an enhanced distance relaying based on the DC offset elimination filter to minimize the effects of DC offset on a long transmission line. The proposed DC offset elimination filter has not need any prior information. The phase angle delay of the proposed DC offset filter did not occurred and the gain error was not found. The enhanced distance relay uses fault current as well as residual current. The behavior of the proposed distance relaying using off-line simulation has been verified using data about several fault conditions generated by the ATP simulation software.

• The Bulletin of The Korean Astronomical Society
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• v.37 no.2
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• pp.157.2-157.2
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• 2012

Direct-conversion receivers often suffer from a DC-offset that is a by-product of the direct conversion process to baseband. In general, a basic approach to reduce the DC-offset is to do simple average of the baseband signal and remove the DC by subtracting the average. However, this gives rise to a residual DC offset which degrades the performance when the receiver adopts the coding schemes with high coding rates such as 8-PSK. Therefore, more advanced methods should be additionally required for better performance. While the training sequences are basically designed to have good auto-correlation properties to facilitate the channel estimation, they may be not good for the simultaneous estimation of the channel response and the DC-offset. Also the DC offset compensation under a bad condition does not give good results due to the estimation error. Correspondingly, the proposed scheme employs the two important points. First, the training sequence codes are divided into two groups by MSE(Mean Squared Errors) for estimating the channel taps and then SNR calculated from each group is compared to predefined threshold to do fine DC-offset estimation. Next, ON/OFF module is applied for preventing performance degradation by large estimation error under severe channel conditions. The simulation results of the proposed scheme shows good performances compared to the existing algorithm. As a result, this scheme is surely applicable to the receiver design in many communications systems.