• Title/Summary/Keyword: dB(V)

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Design of a 1.2V 7-bit 800MSPS Folding-Interpolation A/D Converter with Offset Self-Calibration (Offset Self-Calibration 기법을 적용한 1.2V 7-bit 800MSPS Folding-Interpolation A/D 변환기의 설계)

  • Kim, Dae-Yun;Moon, Jun-Ho;Song, Min-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.3
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    • pp.18-27
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    • 2010
  • In this paper, a 1.2V 7-bit 1GSPS A/D converter with offset self-calibration is proposed. The proposed A/D converter structure is based on the folding-interpolation whose folding rate is 2, interpolation rate is 8. Further, for the purpose of improving the chip performance, an offset self-calibration circuit is used. The offset self-calibration circuit reduce the variation of the offset-voltage,due to process mismatch, parasitic resistor, and parasitic capacitance. The chip has been fabricated with a 1.2V 65nm 1-poly 6-metal CMOS technology. The effective chip area is $0.87mm^2$ and the power dissipates about 110mW at 1.2V power supply. The measured SNDR is about 39.1dB when the input frequency is 250MHz at 800MHz sampling frequency. The measured SNDR is 3dB higher than the same circuit without any calibration.

Effects of Noise and Vibration on Oxygen Consumption and Ammonia Excretion in Cultured Catfish (Silurus asotus) (양식장에서 사육하는 메기 (Silurus asotus)의 산소소비 및 암모니아 배설에 미치는 소음진동 영향)

  • Hur, Jun Wook;Lee, Jeong Yeol;Joo, Jin Chul
    • Ecology and Resilient Infrastructure
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    • v.5 no.2
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    • pp.105-109
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    • 2018
  • The main objective of this investigation was to examine oxygen consumption and ammonia excretion within cultured catfish, Silurus asotus ($22.9{\pm}0.9cm$, $100.7{\pm}11.7g$ n = 30) by noise and vibration stress in aquaculture farm. The vibration of 48, 58 and 68 dB (V) and noise of $77.6{\pm}1.8dB$ (A) from an electric vibrator was turned on for 15 minutes during each hour each day(0800-1800) for 11 days experimental period. The oxygen consumption (OC) of S. asotus the beginning of the experiment (0 day) in 58 dB group after 1, 5, 9 and 11 days was decreased 21.8, 30.2, 36.0 and 53.2%, respectively. In 68 group after 1, 7 and 11 days was decreased 22.7, 35.1 and 57.7%, respectively. The OC decreased exponentially and the relationship between them was expressed as OC = 0.374D + 90.762 ($r^2=0.048$) at 48 dB, OC = -3.581D + 89.520 ($r^2=0.831$) at 58 dB and OC = -4.109D + 90.907 ($r^2=0.884$) at 68 dB. Ammonia excretion (AE) of the beginning of the experiment in 48, 58 and 68 groups after 1 day was increased by 34.8, 51.8 and 63.2%, respectively, but it was decreased significantly from 3 to 11 days. The AE increased exponentially and the relationship between them was expressed as AE = -1.646D + 115.915 ($r^2=0.265$) at 48 dB, AE = -8.230D + 122.132 ($r^2=0.750$) at 58 dB and AE = -7.086D + 123.690 ($r^2=0.614$) at 68 dB.

A Method for Improving Anchor Picture Quality of Multiview Video Coding Scheme (다시점 비디오 부호화의 기준 영상 화질 향상 방법)

  • Park, Min-Woo;Park, Jong-Tae;Park, Gwang-Hoon
    • Journal of Broadcast Engineering
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    • v.13 no.3
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    • pp.388-400
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    • 2008
  • This paper introduces a cost-effective method fur improving anchor picture quality of a multiview video coding scheme that is mainly based on chroma compensation. Proposed method is applied to both INTER $16{\times}16$ and SKIP modes in only anchor P-pictures. By testing using JVT common test conditions, simulation results show that proposed method can obtain the average BD-PSNR gains fur U and V as 0.136 dB and 0.127 dB, respectively, while maintaining almost same performance for Y (luminance). For the range of low bit-rates, it is observed that average BD-PSNR gains of Y, U, and V are 0.141 dB, 0.494 dB and 0.525 dB, respectively. Necessary computational complexity is very marginal because the number of anchor P-pictures is only 4.18% in comparison with whole coded sequences, however it can be found that the proposed method can significantly improve the coding efficiencies of color components.

Electronic Structure and Magnetism of (3d, 4d)-Pd Alloyed c(2×2) Monolayers (3d 및 4d 전이금속과 Pd가 c(2×2) 합금을 이룬 단층의 자성에 대한 제일원리 연구)

  • Kim, Dong-Chul;Choi, Chang-Sik
    • Journal of the Korean Magnetics Society
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    • v.20 no.3
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    • pp.83-88
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    • 2010
  • We investigated the electronic structure and magnetism of the (3d, 4d)-Pd alloyed c($2{\times}2$) monolayer systems, by use of the FLAPW band method. For comparison, pure 3d- and 4d-transition metal monolayers are also considered. We found that the antiferromagnetic configuration of pure V monolayers is sustained in the V-Pd alloy system, while the Ti-Pd alloy system is changed to antiferromagnetic configuration from the ferromagnetic state in pure Ti monolayer. The 4d TM (Mo, Ru, Rh)-Pd monolayers are found to be stable in ferromagnetic configurations. The magnetic moments of Ru and Rh atoms in Ru-Pd and Rh-Pd systems are almost same with those of pure Ru and Rh monolayers, while the magnetic moment of Mo atom is increased to $2.98\;{\mu}_B$ in Mo-Pd alloyed system from the value of Mo monolayer, $0.02\;{\mu}_B$.

Proposals of Reliable Shapes of Supplementary V-ties for Section Jacketing Method of Columns (기둥의 단면 확대보강을 위한 V-타이 보조 띠철근의 형상 제시)

  • Kwon, Hyuck-Jin;Yang, Keun-Hyeok;Sim, Jae-Il
    • Journal of the Korea Institute of Building Construction
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    • v.18 no.2
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    • pp.99-107
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    • 2018
  • The objective of the present study is to propose a reliable shape of supplementary V-ties in the section jacketing approach for seismic strengthening of reinforced concrete columns. A total of 24 pull-out specimens were prepared. The test parameters selected with regard to bond strength of V-ties were the shape of V-ties, embedment length of V-tie legs, and compressive strength of concrete. The measured bond strength of V-ties with different shapes were compared with that of the conventional V-ties and predictions using CEB-FIP equation. Ultimately, V-ties with pressed end-details at their legs could be recommended for the supplementary lateral reinforcement of strengthening columns with jacketing thickness less than the embedment length [= max (75mm, $6d_b$)] of conventional V-ties, where $d_b$ is the diameter of the reinforcing bar used for V-ties.

The Vibration Velocity and Vibration Level of Near-field Blasting Vibration in an Urban Blasting Site (근접장 발파진동에서 진동속도와 진동레벨의 비교)

  • Lee, Yeon-Soo;Chang, Seo-Il
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.15 no.8 s.101
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    • pp.918-923
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    • 2005
  • The vibration level (dB(V)) and vibration velocity (cm/sec) on the ground and buildings due to the differences of the measuring sites from the blasting source was investigated. To compare with vibration level and vibration velocity theirs magnitude was not surely directly proportional and vibration velocity 0.1 cm/sec was $45\~50$ dB(V). The difference between the measured vibration level and the calculated vibration level by Ejima's equation using vibration velocity PVS(peak vector sum) showed $21.0\~30.9$ dB(V) on the ground, $15.3\~23.6$ dB(V) on the apartment, respectively. And the correlation of vibration velocity and nitration level at the measuring sites of lower altitude showed higher than that of higher altitude.

Design and Fabrication of an Aluminum-Gate PMOS Differential Amplifier (알루미늄 게이트 PMOS 차동증폭기의 설계 및 제작)

  • 신장규;권우현
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.19 no.1
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    • pp.14-19
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    • 1982
  • A differential amplifier has been designed and fabricated using aluminum-gate PMOS technology, Only enhaneement-mode MOSFET's are used in the circuit and the dimensions of transistors have been determined using simulation program MSINC. The fabricated integrated circuit with +15V and -l5V power supplies shows an open-loop DC voltage gain of 42 dB, a common mode rejection ratio (CMRR) of 50 dB, and a Power consumption of 20mW.

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Design of V-Band Differential Low Noise Amplifier Using 65-nm CMOS (65-nm CMOS 공정을 이용한 V-Band 차동 저잡음 증폭기 설계)

  • Kim, Dong-Wook;Seo, Hyun-Woo;Kim, Jun-Seong;Kim, Byung-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.10
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    • pp.832-835
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    • 2017
  • In this paper, V-band differential low noise amplifier(LNA) using 65-nm CMOS process for high speed wireless data communication is presented. The LNA is composed of 3-stage common-source differential amplifiers with neutralization of feedback capacitances using MOS capacitors and impedance matching utilizing transformers. The fabricated LNA has a peak gain of 23 dB at 63 GHz and 3 dB bandwidth of 6 GHz. The chip area of LNA is $0.3mm^2$ and the LNA consumes 32 mW DC power from 1.2 V supply voltage.

Low Actuation Voltage RF MEMS Switch (저전압 고주파 MEMS 스위치)

  • 서용교;최영식
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.5
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    • pp.1038-1043
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    • 2003
  • A capacitive-coupled configuration MEMS switch is designed and fabricated, and its characteristics are measured. Low actuation voltage has been achieved by means of small distance between signal line and membrane. Minimum actuation voltage is about 11V. Isolation is around 40dB and insertion loss is about 0.2dB at 2GHz.

A Design of Ultra Wide Band Single-to-Differential Gain Controlled Low Noise Amplifier Using 0.18 um CMOS (0.18 um CMOS 공정을 이용한 UWB 단일 입력-차동 출력 이득 제어 저잡음 증폭기 설계)

  • Jeong, Moo-Il;Choi, Yong-Yeol;Lee, Chang-Suk
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.3
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    • pp.358-365
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    • 2008
  • A differential-gain-controlled LNA is designed and implemented in 0.18 um CMOS technology for $3.1{\sim}4.8GHz$ UWB system. In high gain mode, measurements show a differential power gain of $14.1{\sim}15.8dB,\;13.3{\sim}15dB$, respectably, an input return loss higher then 10dB, an input IP3 of -19.3 dBm, a noise figure of $4.85{\sim}5.09dB$, while consuming only 19.8 mW of power from a 1.8V DC supply. In low gain mode, measurements show a differential power gain of $-6.1{\sim}-4.2dB,\;-7.6{\sim}-5.6dB$, respectably, an input return loss higher then 10dB, an input IP3 of -1.45 dBm, a noise figure of $8.8{\sim}10.3dB$, while consuming only 5.4mW of power from a 1.8V DC supply.