• JSTS:Journal of Semiconductor Technology and Science
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• 제15권1호
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• pp.114-121
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• 2015

In conventional LEDs, a mesa-structure is usually used and it causes the current to be overcrowded in a specific region. We propose a novel structure of GaN-based LED to overcome this problem. In order to distribute the current in an active region, a spreading pad is inserted at the p-type region in the GaN based LED device. The inserted spreading pad helps the current flow because it is more conductive than the p-type GaN layer. By performing electrical and optical simulations, the effects of the spreading pad insertion are confirmed. The results of electrical simulation show that the current spreads more uniformly and more radiative recombination is produced as well. Moreover, from the optical simulation, it is revealed that the ITO is less absorptive material than p-GaN if the condition of specific wavelength sources is satisfied. Considering all of the results, we can conclude that the luminescent power is enhanced by the spreading pad.

• 한국전기전자재료학회논문지
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• 제23권10호
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• pp.767-770
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• 2010

In this work, we investigated the static characteristics of 4H-SiC vertical metal-oxidesemiconductor field effect transistors (VMOSFETs) by adjusting the doping level of n-epilayer and the effect of a current spreading layer (CSL), which was inserted below the p-base region with highly doped n+ state ($5{\times}10^{17}cm^{-3}$). The structure of SiC VMOSFET was designed by using a 2-dimensional device simulator (ATLAS, Silvaco Inc.). By varying the n-epilayer doping concentration from $1{\times}10^{16}cm^{-3}$ to $1{\times}10^{17}cm^{-3}$, we investigated the static characteristics of SiC VMOSFETs such as blocking voltages and on-resistances. We found that CSL helps distribute the electron flow more uniformly, minimizing current crowding at the top of the drift region and reducing the drift layer resistance. For that reason, silicon carbide VMOSFET structures of highly intensified blocking voltages with good figures of merit can be achieved by adjusting CSL and doping level of n-epilayer.

• 전기전자학회논문지
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• 제26권4호
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• pp.728-735
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• 2022

이번 연구에서 우리는 낮은 온 저항을 위해 p-well 영역 아래에 도입된 전류 확산층을 변화시켜 고전압 4H-SiC 전력 Diffused MOSFET(DMOSFET)에 대해 연구했다. Current Spreading Layer(CSL)의 두께(T_CSL)를 0~0.9 um, CSL의 도핑 농도(N_CSL)를 1~5×10¹⁶ cm^-3으로 변화시키면서 소자의 전기적 특성을 분석하였다. TCAD 2D-simulation을 통해 최적화되었으며 CSL이 온 저항을 낮추는 것뿐만 아니라 항복전압도 낮춤으로써 CSL의 최적화의 중요성을 확인하였다. 최적화된 구조는 59.61 mΩ·cm²의 온저항, 5 kV의 항복전압, 0.43 GW/cm²의 Baliga's Figure of Merit(BFOM)을 보여주었다.

• 디지털융복합연구
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• 제12권7호
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• pp.291-296
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• 2014

GaN LED의 p-패드 금속과 에피층 사이에 $SiO_2$ 전류 절연 층을 제작하고, p-전극 금속의 패턴을 핑거(finger) 형태로 확장하여 형성함으로써, 대면적 고출력 소자에서 전류가 균일하게 퍼지도록 유도함과 동시에 p 패드 금속 표면에서의 광 손실을 줄여 광 출력을 증진시켰다. $SiO_2$ 절연 층의 면적과 두께를 다르게 하면서 광 출력의 증가를 비교 확인하였고, 실바코 사의 ATLAS 툴을 이용하여 컴퓨터 시뮬레이션을 실시함으로써 LED 내 활성 층에서의 전류 밀도 분포를 계산하였다. $SiO_2$ 절연 층의 두께가 $50{\mu}m$와 $100{\mu}m$ 인 두 경우 모두, p 패드의 직경이 $105{\mu}m$이고 핑거의 폭은 $12{\mu}m$인 경우와 비교할 때, p 패드의 직경이 $100{\mu}m$이고 핑거의 폭이 $6{\mu}m$인 경우가 더 높은 광 출력 특성을 나타냈다.

• 한국재료학회지
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• 제19권8호
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• pp.443-446
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• 2009

This study develops a highly transparent ohmic contact scheme using indium oxide doped ZnO (IZO) as a current spreading layer for p-GaN in order to increase the optical output power of nitride-based lightemitting diodes (LEDs). IZO based contact layers of IZO, Ni/IZO, and NiO/IZO were prepared by e-beam evaporation, followed by a post-deposition annealing. The transmittances of the IZO based contact layers were in excess of 80% throughout the visible region of the spectrum. Specific contact resistances of $3.4\times10^{-4}$, $1.2\times10^{-4}$, $9.2\times0^{-5}$, and $3.6\times10^{-5}{\Omega}{\cdot}cm^2$ for IZO, Ni/Au, Ni/IZO, and NiO/IZO, respectively were obtained. The forward voltage and the optical output power of GaN LED with a NiO/IZO ohmic contact was 0.15 V lower and was increased by 38.9%, respectively, at a forward current of 20 mA compared to that of a standard GaN LED with an Ni/Au ohmic contact due to its high transparency, low contact resistance, and uniform current spreading.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.63-63
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• 2009

In this work, we demonstrate 800V 4H-SiC power DMOSFETs with several structural alterations to observe static DC characteristics, such as a threshold voltage ($V_{TH}$) and a figure of merit ($V_B^2/R_{SP,ON}$). To optimize the static DC characteristics, we consider four design parameters; (a) the doping concentration ($N_{CSL}$) of current spreading layer (CSL) beneath the p-base region, (b) the thickness of p-base ($t_{BASE}$), (c) the doping concentration ($N_J$) and width ($W_J$) of a JFET region, (d) the doping concentration ($N_{EPI}$) and thickness ($t_{EPI}$) of epi-layer. Design parameters are optimized using 2D numerical simulations and the 4H-SiC DMOSFET structure results in high figure of merit ($V_B^2/R_{SP,ON}$>~$340MW/cm^2$) for a power MOSFET in $V_B{\sim}1200V$ range.

• 한국전기전자재료학회논문지
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• 제22권8호
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• pp.637-640
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• 2009

In this work, we demonstrate 800 V 4H-SiC power DMOSFETs with several structural alterations to obtain a low threshold voltage ($V_{TH}$) and a high figure of merit ($V_B\;^2/R_{SP,ON}$), To optimize the device performance, we consider four design parameters; (a) the doping concentration ($N_{CSL}$) of current spreading layer (CSL) beneath the p-base region, (b) the thickness of p-base ($t_{BASE}$), (c) the doping concentration ($N_J$) and width ($W_J$) of a JFET region, (d) the doping concentration ($N_{EPI}$) and thickness ($t_{EPI}$) of epi-layer. These parameters are optimized using 2D numerical simulation and the 4H-SiC DMOSFET structure results in a threshold voltage ($V_{TH}$) below $^{\sim}$3.8 V, and high figure of merit ($V_B\;^2/R_{SP,ON}$>$^{\sim}$200 $MW/cm^2$) for a power MOSFET in $V_B\;^{\sim}$800 V range.

• 한국정밀공학회지
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• 제33권5호
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• pp.419-425
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• 2016

A powder spreading phenomenon is one of disadvantageous characteristics of the powder bed fusion process using electron beams. The powder spreading phenomenon can be controlled using a pre-heating process of metallic powders. The aim of this paper was to investigate the preheating process of Stellite21 powder using electron beams. Powder spreading experiments were performed to examine the influence of process parameters on the spreading behaviors of Stellite21 powder. Powder heating experiments were carried to investigate the effects of the focusing current of the electron beam on the quality of the heated region. Using the results of the powder spreading and heating experiments, an appropriate combination of process parameters was obtained. The pre-heating experiment of Stellite21 was performed using the estimated combination of process parameters. The results of preheating experiments showed that the preheated Stelllite21 layer with desired characteristics can be created when the estimated combination of process parameters is applied.

• 한국광학회지
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• 제18권2호
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• pp.155-161
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• 2007

본 논문에서는 GaN/InGaN 다중양자우물(MQW)의 청색 발광 다이오드(LED)에서의 3차원적인 전류 및 2차원적인 광 분포를 보여 주기 위해 새롭고 간단한 3차원 회로 모델링과 해석이 처음으로 제안되었으며 이를 실험적으로 검증하였다. LED의 회로 파라미터들은 금속 및 에피 박막의 저항과 다이오드만으로 이루어져 있으며 각각의 파라미터는 전송선 모델(TLM) 및 전압-전류의 특성으로부터 얻을 수 있다. 제안된 방법과 회로 파라미터를 상부로 발광하는(top-surface emitting) LED에 적용하여 금속 및 에피 박막의 각 저항 변화에 따라 활성층을 지나가는 전류 분포의 효과를 정량적으로 해석하였다. 그리고 제작된 청색 LED 소자의 발광 분포는 p-전극 주위에서 어두운 발광 분포를 보이는 해석 결과와 유사한 경향을 보여주었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 춘계학술대회 논문집
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• pp.35-36
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• 2009

In this work, we demonstrate 800V 4H-SiC power DMOSFETs with several structural alterations to obtain a low threshold voltage ($V_{TH}$) and a high figure of merit ($V_B^2/R_{SP,ON}$). To optimize the device performance, we consider four design parameters; (a) the doping concentration ($N_{CSL}$) of current spreading layer (CSL) beneath the p-base region, (b) the thickness of p-base ($t_{BASE}$), (c) the doping concentration ($N_J$) and width ($W_J$) of a JFET region, (d) the doping concentration ($N_{EPI}$) and thickness ($t_{EPI}$) of epi-layer. These parameters are optimized using 2D numerical simulation and the 4H-SiC DMOSFET structure results in a threshold voltage ($V_{TH}$) below ~3.8V, and high figure of merit ($V_B^2/R_{SP,ON}$>${\sim}200MW/cm^2$) for a power MOSFET in $V_B$-800V range.