• Journal of Power Electronics
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• 제16권6호
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• pp.2243-2257
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• 2016

This paper presents a two stage three-phase proton exchange membrane fuel cell (PEMFC) generation system. When the system is connected to a three-phase load, it is very sensitive to the characteristics and type of the load. Especially unbalanced three-phase loads, which result in a pulsating power that is twice the output frequency at the inverter output, and cause the dc-link to generate low frequency ripples. This penetrates to the fuel cell side through the front-end dc-dc converter, which makes the fuel cell work in an unsafe condition and degrades its lifespan. In this paper, the generation and propagation mechanism of low frequency ripple is analyzed and its impact on fuel cells is presented based on the PEMFC output characteristics model. Then a novel method to evaluate low frequency current ripple control capability is investigated. Moreover, a control scheme with bandpass filter inserted into the current feed-forward path, and ripple duty ratio compensation based on current mode control with notch filter is also proposed to achieve low frequency ripple suppression and dynamic characteristics improvement during load transients. Finally, different control methods are verified and compared by simulation and experimental results.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2003년도 학술대회논문집
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• pp.279-281
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• 2003

We analysed the operating properties of resistive type superconducting fault current limiters (SFCLs) based on YBCO thin films with a single line-to-ground fault. When a single line-to-ground fault occurred, the short circuit current of a fault phase increased up to about 6 times of transport currents immediately after the fault instant and was effectively limited to the designed current level within 2 ms by the resistance development of the SFCL. The fault currents of the sound phases almost did not change because of their direct grounding system. The unsymmetrical rates of a fault phase were distributed from 6.4 to 1.4. It was found that the unsymmetrical rates of currents were noticeably improved within one cycle after the fault instant. We calculated the zero phase currents for a single line-to-ground fault using the symmetrical component analysis. The positive sequence resistance was reduced remarkably right after the fault but eventually approached the balanced positive resistance component prior to the system fault. This means that the system reaches almost the three-phase symmetrical state in about 60 ㎳ after the fault. The ground currents were almost 3 times of the zero phase mts since most of the fault currents flowed through the grounding line.

• Journal of Power Electronics
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• 제18권6호
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• pp.1920-1929
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• 2018

In order to provide a source for nine phases suitable for 18-pulse ac to dc power, this paper proposes a new structure for a step-up asymmetrical delta-connected transformer for converting three-phase ac power to nine-phase ac power. The design allows for symmetry between the nine output voltages to improve the power quality of the supply current and to minimize the THD. The results show that this new structure proves the equality between the output voltages with $40^{\circ}-{\alpha}$ and $40^{\circ}+{\alpha}$ phase shifting and produces symmetrical output currents. This result in the elimination of harmonics in the network current and provides a simulated THD that is equal to 5.12 %. An experimental prototype of the step-up asymmetrical delta-autotransformer is developed in the laboratory and the obtained results give a network current with a THD that is equal to 5.35%. Furthermore, a finite element analysis with a 3D magnetic field model is made based on the dimensions of the 4kVA, 400 V laboratory prototype three-phase with three-limb delta-autotransformer with a six-stacked-core in each limb. The magnetic distribution flux, field intensity and magnetic energy are carried out under open-circuit operation or load-loss.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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• pp.724-729
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• 1998

In general, a single-phase current-fed PWM inverter using IGBTs has some unique advantages for small scale distributed utility-interactive power supply system as compared with voltage-fed PWM inverter. In particular, this is more suitable and acceptable for a non-isolated type utility-interactive power conditioner, which is going to be widely used for residential solar photovoltaic (PV) power generation system in Japan. However, this current-fed PWM inverter has a significant disadvantage. The output current of this inverter includes large harmonic contents when the inductance of smoothing reactor in its DC side is not large enough to eliminate its current ripple components of this inverter. In order to overcome this problem, a new conceptual pulse area modulation scheme for this inverter is introduced in difference with conventional PWM strategy. This paper presents a new effective control implementation of this PV power conditioner which is able to reduce the harmonic component in the output current produced by the single-phase current-fed PWM inverter even when the ripple current in the smoothing DC reactor is relatively large. The operating principle of the proposed control strategy introdued for this inverter system is described, and its simulation results are evaluated and discussed herein.

• 전기학회논문지P
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• 제57권2호
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• pp.72-78
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• 2008

The speed variation of SRM is fulfilled throughout a transition from chopping control to single pulse operation. (i,e., low speed to high speed operation). It is unsatisfied with performance at all operational regimes. In this paper, the operational performance of SRM can be improved by using current hysteresis control method. This method maintains a generally flat current waveform. At the high speed, the current chopping capability is lost due to the development of the back-EMF. Therefore SRM operates in single pulse mode. By using zero-current switching and zero-voltage switching technique, the stress of power switches can be reduce in chopping mode. When the commutation from one phase winding to another phase winding, the current can be zero as fast as possible in this period because several times negative voltage of DC-source voltage produce in phase winding. This paper is compared to performance based on conventional C-dump converter topology and the proposed resonant C-dump converter topology. Simulation and experimental results are presented to verify the effectiveness of the proposed circuit.

• 전기학회논문지P
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• 제57권1호
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• pp.6-13
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• 2008

National standard system for calibrating current transformer(CT) up to primary current of 20,000A have been established. The system consists of 20,000 A AC high current source, CT comparator, standard CT, CT under test and CT burden. An AC high current is applied tn the primary windings of both the standard CT and the CT under test, and then the CT comparator measures the ratio error and the phase displacement by comparing the secondary currents of the two transformers. As a validity check for 20,000 A CT calibration system, the comparison with the two national standard institutes(NMIs) has been performed using same CTs. The comparison results of the CTs are consistent with those measured at two NMIs within 0.004 % for ratio error and 0.1 min for phase displacement in the primary current ranges of Ip = 10 - 20,000 A with a secondary current of Is = 5 A.

• 전력전자학회논문지
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• 제19권4호
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• pp.332-341
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• 2014

A cascaded H-bridge multi-level STATCOM(STATic synchronous COMpensator), which is composed of many cell inverters with independent dc-sources, generates inevitably dc-side voltage unbalance among phases when it compensates unbalanced load. It comes from the difference of flowing active power in each phase when this compensator makes negative-sequence current to eliminate the unbalance of source-side current. However, this unbalance can be controlled by injecting zero-sequence current which is decoupled with grid currents, so the compensator can work well during this balancing process. Both a feedback control algorithm, which produces zero-sequence current proportional to dc-side voltage unbalance within each phase, and a feedforward control algorithm, which makes zero-sequence current directly from the compensator's negative-sequence current, were proposed. The dc-side voltage of each phase can be controlled stably by these proposed algorithms in both steady-state and transient, so the compensator can have fast response to satisfy control performance under rapid changing load. These balancing controllers were implemented and verified via simulation and experiment.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 추계학술대회 논문집 학회본부
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• pp.277-280
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• 1988

In the current-controlled PWM, the actual current tracks the sinusoidal reference wave within desired hyeteresis band. This paper au99e61s the current control scheme for voltage-fed single-phase inverter and presents the simulation results. It is expected that the inverter with this control method produces no significant lower-order harmonics.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.643-645
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• 1999

The conventional high frequency phase-shifted full bridge dc/dc converter has a disadvantage that a circulating current flows through transformer and switching devices during the freewheeling interval. Due to this circulating current, RMS current stress, conduction losses of transformer and switching devices are increased. To alleviate this problem, this paper provides a circulating current free type high frequency soft switching phase-shifted full bridge (FB) dc/dc converter with the modified energy recovery snubber (ERS) attached at the secondary side of transforemr.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.354-357
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• 1999

This paper is proposed Single phase Multi-Level AC-DC Converter. This is consist of diode bridge and switches. The number of the supply current levels depends on the number of the individual converter's current level. In this converter circuit the number of the levels is equal to 2(M+1) -1, where M is the number of Switching-Leg's number. In this paper is introduced converter with 31 current Level. If the number of current level is increased, smoother sinusoidal waveform can be obtained. The feasibility of the circuit is verified by computer simulation using PSIM