• 융합신호처리학회논문지
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• 제6권3호
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• pp.134-142
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• 2005

전류모드 CMOS 회로기반 다치 논리 회로가 최근에 구현되고 있다. 본 논문에서는 4-치 Unary 다치 논리 함수를 전류모드 CMOS 논리 회로를 사용하여 합성하였다. 전류모드 CMOS(CMCL)회로의 덧셈은 각 전류 값들이 회로비용 없이 수행될 수 있고 또한 부의 논리 값은 전류흐름을 반대로 함으로써 쉽게 구현이 가능 하다. 이러한 CMCL 회로 설계과정은 논리적으로 조합된 기본 소자들을 사용하였다. 제안된 알고리듬을 적용한 결과 트랜지스터의 숫자를 고려하는 기존의 기법보다 더욱 적은 비용으로 구현할 수 있었다. 또한 비용-테이블 기법의 대안으로써 Unary 함수에 대해서 범용 UUPC(Universal Unary Programmable Circuit) 소자를 제안하였다.

• 한국전자통신학회논문지
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• 제15권3호
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• pp.479-486
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• 2020

이 논문에서는 아날로그 전류모드 인공지능 프로세서에서 핵심 디바이스 중에 하나인 아날로그 전류 모드 곱셈기 회로의 선형성과 동적범위 향상을 위한 설계 기법을 소개한다. 제안하는 회로는 4 quadrant Translinear loop를 NMOS 트랜지스터만으로 구성하여, 트랜지스터의 물리적 Mismatch를 최소화하는 설계로 0.35㎛ CMOS 공정에서 117㎛ × 109㎛로 구현가능하였으며, 최대 전고조파왜율 0.3% 의 선형성을 확보할 수 있었다. 제안한 아날로그 전류모드 곱셈기는 전류모드 인공지능 프로세서의 핵심 회로로 유용할 것으로 기대된다.

• 전력전자학회논문지
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• 제21권3호
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• pp.200-206
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• 2016

In the microgrid, inverters for energy storage system are generally constructed in a parallel structure because of capacity expandability, convenience of system maintenance, and reliability improvement. Parallel inverters are required to provide stable voltage to the critical load in PCC and to accurately share the current between each inverter. Furthermore, when islanding occurs, the inverters should change its operating mode from grid-connected mode to stand-alone mode. However, during clearing time and control mode change, the conventional control method has a negative impact on the critical load, that is, severe fluctuating voltage. In this study, a parallel operation control method is proposed. This method provides seamless mode transfer for the entire transition period, including clearing time and control mode change, and has accurate current sharing between each inverter. The proposed control method is validated through simulation and experiment.

• 대한전자공학회논문지SD
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• 제47권7호
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• pp.1-7
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• 2010

Fin 폭이 다른 accumulation-mode Pi-gate p-채널 MOSFET의 고온특성을 측정 분석하였다. 사용된 소자는 Fin 높이는 10nm 이며 폭은 30nm, 40nm, 50nm 의 3종류이다. 온도에 따라서 드레인 전류, 문턱전압, subthreshold swing, 유효이동도 및 누설 전류 특성을 측정하였다. 온도가 증가할수록 드레인 전류는 상온에서 보다 약간 증가하는 현상이 나타났다. 온도에 따른 문턱전압의 변화는 inversion-mode 소자 보다 작은 것으로 측정되었다. 유효이동도는 온도가 증가할수록 감소하였으나 Fin 폭이 감소할수록 이동도는 큰 것을 알 수 있었다.

• 한국초전도저온공학회:학술대회논문집
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• 한국초전도저온공학회 2002년도 학술대회 논문집
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• pp.291-293
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• 2002

In this paper, we fabricated a persistent current mode magnet using Bi-2223 HTS tapes. The coil system consists of double pancake magnet and a persistent current switch and jointed them with solder. Persistent current mode operation of the system was measured experimentally by the decay behavior of the current. We found that resistive component of the system including flux flow resistance lead the exponentially field decay with time.

• Ocean and Polar Research
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• 제36권2호
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• pp.165-177
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• 2014

In an effort to investigate the structure and variability of the coastal current in the East Sea, a moored ADCP observation was conducted off Uljin from late May to mid-October 2006. Owing to the transition of season from summer to autumn, the features of the current and wind can be divided into two parts. Until mid-August (Part-I), a southward flow is dominant at all depths with a mean alongshore velocity of 4.2~8.9 cm/s but northward winds are not strong enough to reverse the near-surface current. During Part-II, a strong northward current occurs frequently in the upper layer but winds are predominantly southward including two typhoons that have deep-reaching influence. Profile of mean velocity has three layers with a northward velocity embedded at 12~28 m depth. The near-surface current of Part-II significantly coheres with winds at 4-8 day periods with a phase lag of about 12 hours. The modal structure of the current obtained by EOF analysis is: (1) Mode-1, having 83.6% of total variance, represents the current in the same direction at all depths corresponding to the southward North Korean Cold Current (NKCC). (2) Mode-2 (11.7%) reveals a two-layer structure that can be explained by the northward East Korean Warm Current (EKWC) in the upper layer and NKCC in the lower. (3) Mode-3 (2.6%) has three layers, in which the EKWC is reversed near the surface by opposing winds. This mode is particularly similar to the mean velocity profile of Part-II.

• 한국통신학회논문지
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• 제37권3A호
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• pp.157-162
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• 2012

본 논문에서는 후보 모드표를 이용한 새로운 화면내 모드 부호화 방법을 제안한다. 기존의 HEVC는 예측한 최고확률모드(most probable mode, MPM)가 현재 블록의 실제 모드와 동일하지 않을 경우 고정길이 부호(fixed length code, FLC)를 이용해 실제 모드 정보를 이진화한다. 하지만 HEVC는 화면내 블록은 많은 수의 모드를 사용하기 때문에 FLC를 이용해 이진화를 하면 코드워드의 길이가 길어진다. 본 논문에서는 예측한 MPM이 실제 모드와 동일하지 않은 경우 인접한 블록을 통해 생성한 후보 모드표를 이용해 부호화할 인덱스를 얻고, 이를 FLC 대신 통계적 특성을 고려한 Golomb-Rice 코드를 이용해 이진화하는 방법을 제안한다. 실험을 통해 제안한 방법이 기존의 HEVC 화면내 모드 부호화 방법에 비해 평균 약 0.5%의 비트 수를 감소시키는 것을 확인했다.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제52권7호
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• pp.343-351
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• 2003

In this paper, interleaved boost converter is applied as a first-stage converter in switch mode power supply. The first-stage converter plays a role to improve power factor. Interleaved Boost Power Factor Corrector(IBPFC) can reduce input current ripple as a single voltage control loop only without inner current loop, because input current is divided each 50% by two switching devices. Each converter cell is also operated in discontinuous current mode and inductor current of each converter is discontinuous. Total input current which is composed by each converter cell is continuous current. Thus, IBPFC is able to improve input current ripple. IBPFC operating in discontinuous current mode can be classified as six modes from switching state and be carried out state space averaging small signal modeling. A control transfer function is obtained according to the modeling. Not only steady-state characteristics but also dynamic characteristics is considered. Single voltage control loop is also constructed by the control transfer function. From experimental result, improvement of power factor and input current ripple are verified.

• 전력전자학회논문지
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• 제17권4호
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• pp.315-321
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• 2012

The utility-interactive inverter with critical loads should supply continuous and stable voltage to critical loads even during the grid fault. The conventional control method which performs current control for grid-connected mode and voltage control for stand-alone mode undergoes the critical load voltage variation during grid fault. The critical load voltage may have large transient when the inverter performs mode transfer after the islanding detection. Recently, the indirect current control method which does not have the transient state during not only islanding detection but also the mode transfer has been proposed. However, since the voltage control is maintained even during the grid-connected mode it is difficult to detect the islanding. This paper proposes an active anti-islanding method suitable for the indirect current control method which does not have NDZ(Non-Detection Zone).

• 한국전기전자재료학회논문지
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• 제22권2호
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• pp.123-127
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• 2009

In order to get more higher integration density of devices, it is getting to be used more and more micro via interconnection lines for interconnecting layers or devices. However, it is very important to enhance the electrical characteristic by reducing the electrical resistivity of micro via interconnection line because it affects the reliability of packaging. In this paper, Micro vias were patterned with a diameter from 10 to 100 um by increasing the step of 10 um and 100 um height and were fabricated by micromachining technology to investigate the electrical characteristic of micro via interconnection lines. These micro vias were filled with copper by electroplating process with appling pulse current mode. And the electrical characteristics of micro via interconnection lines were measured. The measured value of electrical resistivity shows with a range from 20 to $26\;m{\Omega}$. This value from micro via interconnection lines fabricated by pulse current mode electroplating process shows better result than the resistivity from than micro via interconnection lines fabricated by DC mode ($31\;m{\Omega}$).