• 제목/요약/키워드: current gain

검색결과 1,367건 처리시간 0.027초

스위칭 레귤레이터에 있어서 과도응답에 대한 연구 (A Study on the transient response in the switching regulator)

  • 김희준;김순창
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1989년도 추계학술대회 논문집 학회본부
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    • pp.235-239
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    • 1989
  • This paper investigated the effect of right half plane zero on the transient response in the buck-boost DC-DC converter. And it is clarified that the damping ratio decreases gradually by increases of the feedback loop gain and the regulation system of the converter becomes unstable. From the result, we obtained the stability region about the duty ratio and the output current by evaluating the feedback loop gain.

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고속 신호처리를 위한 GaAs MESFET's 스위치드 커패시터 필터 설계에 관한 연구 (A Study on the Design of GaAs MESFET's Switched Capacitor Filter Using GaAs MESFETs for High-Speed Signal Processing)

  • 김학선;임명호;김경월;이형재
    • 전자공학회논문지B
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    • 제30B권7호
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    • pp.42-49
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    • 1993
  • In this paper, switched-capacitor building block presented which are suitable for implementation in GaAs MESFET technology. They include a current source, a gain stage, and an operational amplifier. Switched-capacitor design techniques are discussed that minimize filter sentsitivity to finite gain of the GaAs operational amplifier. Simulation results are presented on third-order elliptic lowpass ladder filter at a sampling rate of 5GHz.

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1.5V-25MHz 대칭적 귀환전류 증가형 연속시간 전류 구동 CMOS 필터 (A 1.5V-25MHz symmetric feedback current enhancement continuous-time current-mode CMOS filter)

  • 장진영;윤광섭
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1998년도 하계종합학술대회논문집
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    • pp.514-517
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    • 1998
  • This paper proposed a symmetric feedback current enhancement circuit with 1.5V power supply to design a 3$^{rd}$ order butterworth low pass filter. The proposed filter designed on 0.8.mu.m CMOS n-well double poly/double metal process simulated in HSPICE composed of the 3dB frequency enhancement circuit and the unity-gain frequency enhancement circuit. The simulation result on the design filter shows the badnwith of 25MHz, phase of 92.6 .deg. and power consumption of 0.3mW..

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Electronically Tunable Current-Mode Second-Order Multifunctional Filter Using FTFNs and Dual-Output OTAs

  • Tangsrirat, Worapong;Anuntahirunrat, Kongsak;Surakampontorn, Wanlop
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2001년도 ICCAS
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    • pp.99.2-99
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    • 2001
  • An electronically tunable current-mode second-order multifunctional filter is described in this paper. The proposed filter consists of two four-terminal floating nullors (FTFNs), two dual-output OTAs and two grounded capacitors. The circuit can simultaneously realize the lowpass, bandpass and highpass current transfer functions from the same configuration without changing the circuit configuration and elements. The natural angular frequency we and the parameter wo/Q can be orthogonally controlled through adjusting the transconductance gain of OTA. PSPICE simulation results are employed to confirm the circuit performance.

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게이트가 파인 구조를 이용한 SOI MOSFET에서의 항복전압 개선 (Breakdown Voltage Improvement in SOI MOSFET Using Gate-Recessed Structure)

  • 최진혁;박영준;민홍식
    • 전자공학회논문지A
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    • 제32A권12호
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    • pp.159-165
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    • 1995
  • A gate-recessed structure is introduced to SOI MOSFET's in order to increase the source-to-drain breakdown voltage. A significant increase in the breakdown voltage is observed compared with that of a planar single source/drain SOI MOSFET without inducing the appreciable reduction of the current drivability. We have analyzed the origin of the breakdown voltage improvement by the substrate current measurements and 2-D device simulations, and shown that the breakdown voltage improvement is caused by the reductions in the impact ionization rate and the parasitic bipolar current gain.

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SOI 트렌치-모스 바이폴라-모드 전계효과 트랜지스터 구조의 설계 및 수치해석 (Design and Numerical Analyses of SOI Trench-MOS Bipolar-Mode Field Effect Transistor)

  • 김두영;오재근;한민구;최연익
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제49권5호
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    • pp.270-277
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    • 2000
  • A new Lateral Trench-MOS Bipolar-Mode Field-Effect Transistor(LTMBMFET) is proposed and verified by MEDICI simulation. By using a trench MOS structure, the proposed device can enhance the current gain without sacrificing other device characteristics such as the breakdown voltage. The channel region of the proposed device is formed between the trench MOS structure. So the effect of the substrate voltage is negligible when compared with the conventional device which has a channel region between the gate junction and the buried oxide layer.

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온도변화에 따른 GaAs MESFET의 주파수 특성에 관한 연구 (A Study on Frequency Response of GaAs MESFET with different Temperatures)

  • 정태오;박지홍;안형근;한득영
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
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    • pp.550-553
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    • 2001
  • In this study, unity current gain frequency f$\_$T/ of GaAs MESFET is predicted with different temperatures up to 400 $^{\circ}C$. Temperature dependence parameters of the device including intrinsic carrier concentration n$\_$i/ effective mass, depletion width are considered to be temperature dependent. Small signal parameters such as gate-source, gate dran capacitances C$\_$gs/ C$\_$gd/ are correlated with transconductance g$\_$m/ to predict the unity current gain frequency. The extrinsic capacitance which plays an important roles in high frequency region has been taken into consideration in evaluating total capacitance by using elliptic integral through the substrate. From the results, f$\_$T/ decreases as the temperature increases due to the increase of small signal capacitances and the mobility degradation. Finally the extrinsic elements of capacitances have been proved to be critical in deciding f$\_$T/ which are originated from the design rule of the device.

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LD gain-switching에 의한 초단 광 펄스 발생 해석 (Analysis of ultra-short optical pulse generation by LD gain-switching)

  • 김윤중;김동각;김창민
    • 전자공학회논문지D
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    • 제34D권10호
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    • pp.85-92
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    • 1997
  • For a InGaAsP buried - heterostructrue $1.3\mu\textrm{m}$ LD with fabry-perot cavity structure, the procedures of ultra-short optical pulse genration ar eanalyzed by simulating the rate equations. Investigting the effects of injected current pulse parameters such as bias $J_b$, pulse width $T_d$ and pulse amplitude $J_p$ on the generated optical pulses, we derive the optimum conditions to obtain a single optical pulse with strong peak value. We also observe that the repetition rate of current pulses needs to be restricted under a certain threshold to generate a train of single optical pulses, and that the period doubling phenomenon takes place by increasing the repitition rate.

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광대역 이득을 가진 SOA/DFB-SOA를 이용한 전광 논리구현 (All-optical Logic gate using the SOA/DFB-SOA with Broadband-Gain)

  • 김영일;김재헌;이석;우덕하;윤태훈
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 춘계학술대회 논문집 디스플레이 광소자 분야
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    • pp.109-111
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    • 2002
  • We have demonstrated all-opticalflip-flop based on optical bistability in a SOA/DFB-SOA with broadband gain. Input signal with the wavelength of 1340.23 nm or 1680.93 nm and the current of about 98% of the lasing threshold is injected into theDFB-SOA. Current injected into SOA is 80 mA All-optical flip-flop has various applications such as all-optical memory, demultiplexing, packet-header buffering, and retiming.

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Design of a Current-Mode CCII-Based Bandpass Filter from Immittance Function Simulator using Commercial Available CCII (AD844)

  • Prakobnoppakao, Songphan;Chipipop, Boonruk;Surakampontorn, Wanlop;Watanabe, Kenzo
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 ITC-CSCC -2
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    • pp.743-746
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    • 2002
  • This paper proposes the design of a current-mode CCII-based 2$\^$nd/ _order bandpass biquad filter from a grounded series capacitor and frequency-dependent negative conductor ( C-D ) immittance function simulator using the macro model of a commercial available CCII+, AD844, from Analog Devices, Inc. The results are compared with the other results those are designed using ideal model of CCII-. The gain and phase deviations; due to the effects of passive sensitivity, active sensitivity, gain sensitivity and component variability; are considered using Monte-Carlo analysis of PSpice program.

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