• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.28 no.1
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• pp.16-28
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• 2014

This paper presents a novel high-power-factor circuit topology of AC to AC current-fed type high frequency resonant inverter which includes the function of power factor correction(PFC) in the proposed inverter to operate the AC input block with high power factor. The proposed circuit topology of AC to AC current fed type high resonant inverter removes DC link electrolytic capacitor and has also the one of power factor correction(PFC) in the inverter circuit without an additional PFC circuit since the input current by constituting it in parallel as an unit inverter, which assumes the class-E high frequency resonant inverter of conventional current-fed type, flows in the form of the resultant current flowing through each constant current reactor($L_{d1}$, $L_{d2}$). The circuit analysis of proposed inverter is generally described by adopting the normalized parameters and the evaluation of its operating characteristics are conducted by using the parameters such as the ratio of switching and resonant frequency(${\mu}$), coupling coefficient(k) and so on. An example of procedure for circuit design based on the characteristic values obtained from the theoretical analysis is presented. To confirm the validity of the theoretical analysis, the experimental results are also presented. In the future, the proposed inverter shows it can be practically used as power supply system for induction heating application, DC-DC converter etc.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.493-498
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• 2004

The EMI noise source in a switching mode power supply is dominated by a common mode noise. If we can understand the common mode noise occurring mechanism, it is resulted to find out the method to suppress the EMI noise source in the switching mode power supply. The common mode noise is occurring mostly due to circuit is unbalanced which is caused by the capacitive coupling to frame ground, which passes through a heatsink of the switching devices. This research paper presents a new effective balancing method of buck converter circuit by mean of grounding the parasitic and compensation capacitors in correct proportion which is called that the common mode impedance balance (CMIB). The CMIB can be achieved by source, transmission line and termination balanced, such balancing, the common mode current will be cancelled out in the frame ground. The greatly reduced common mode noise can be confirmed by the experimental results.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.743-746
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• 2005

This paper proposes a novel structure of output buffer circuits for PDP data drivers. The proposed circuit is free from capacitive coupling effect from the output electrode and suppresses the short circuit currents, which improves the current driving capability and reduces the power consumption.

• Proceedings of the KIPE Conference
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• 2011.11a
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• pp.26-27
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• 2011

This paper focuses on the zero-voltage/zero current transition voltage equalization circuit for the series connected battery cell. By adding auxiliary resonant cells at the main switching devices such as MOSFET or IGBT, zero current switching is achieved and turned off loss of switching elements is eliminated and by the voltage/second balancing of the inductor, zero voltage switching can be applied to switching element. Transformer coupling between battery cells and ZVZCT (Zero Voltage Zero Current Transition) switching method allow the fast balancing speed and high frequency operation, which reduces the size and weight of the circuit. The validity of the battery equalization is further verified using simulation involving four lithium-ion battery cell models.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.489-496
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• 2001

This paper proposes an unified definition of powers for various circuit conditions such as balanced/unbalanced, sinusoidal/non-sinusoidal, and linear/nonlinear, for single-phase systems and three-phase systems. Conventional reactive power is more classified into an interactive power and a scattering power. These powers are defined both in the time domain and the frequency domain consistently, and agree well with the conservation law. Several important power quality factors are defined to measure and evaluate the power quality for the various circuits in the single-phase and three-phase systems. Simulation results show the power quality factors can evaluate and classify the various circuit conditions clearly.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.2
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• pp.119-126
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• 2003

In this paper, a cylindrical cavity resonator oscillator with high Q factor is designed and fabricated to improve the phase noise characteristic. A cavity resonator is coupled to oscillating circuit using aperture hole. Measured results show that the cylindrical cavity resonator oscillator (CRO) for Ku-band has less phase noise than the dielectric resonator oscillator (DRO) with the same oscillating circuit. It has output power of +3.92 dBm at the center frequency 13.4015250 GHz and phase noise of -109 dBc/Hz at 100 kHz offset.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.10a
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• pp.1113-1118
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• 2004

This paper presents the dynamic analysis method for an electromechanical system. The engineer has at his disposal a variety of software simulation tools. However, difficulties arise when the study of the behavior of complex electromechanical systems in combination with coupling element is required. Typical examples of such systems are machines for factory automation, home automation, and office automation. Dynamic systems analysis packages or electronic systems analysis packages offer the restrictive to simulate these mixed systems such electromechanical product. Electronic circuit analysis algorithm is easily incorporated into a multi-body dynamics analysis algorithm. The governing equation of electronic circuit is formulated as a differential algebraic equation form including both electrical and mechanical variables and is simultaneously solved in every time step. This analysis method clearly demonstrates the application potential for mixed electromechanical simulation.

• ETRI Journal
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• v.33 no.1
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• pp.121-124
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• 2011

Digital harmonics, which may reduce the radio frequency sensitivity of a system, can be coupled with an antenna in a mobile handset. This letter presents a decoupling method for increasing the isolation between digital harmonics on a flexible printed circuit board (FPCB) and an antenna in terms of the ground mode current and the concept of reaction. We model the signal and ground lines in an FPCB as a loop circuit exciting a ground mode current and demonstrate a simple but efficient decoupling method for reducing the excited ground mode current.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.58 no.4
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• pp.592-596
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• 2009

DAFC(direct alcohol fuel cell) takes the same structure and operational principle with PEMFC(Proton exchange membrane fuel cell). However, DAFC, which uses liquid alcohol instead of hydrogen as fuel, is able to be used as a portable power for small-scaled electronic devices such as MP3, PMP, and mobile phone because alcohol is quite convenient steady-state compound to carry and store it. This paper presents the OCV(open circuit voltage) characteristics of the cases which are alcohol species and different weight rate of ethanol, respectively. The OCV of methanol fuel cell is slightly higher 0.2V than ethanol one, and 8% wt. rate ethanol is rated as the most appropriate fuel for DAFC.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.10
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• pp.1606-1616
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• 1989

In this paper, the design of DYNAMIC CMOS ARRAY LOGIC which has both advantages of dynamic CMOS and array logic circuits is proposed. The major components of DYNAMIC CMOS ARRAY LOGIC are two-stage dunamic CMOS circuits and an internal clock generator. The function block of dynamic CMOS circuits is realized as a parallel interconnection of NMOS transistors. Therefore the operating speed of DYNAMIC CMOS ARRAY LOGIC is much faster than the one of the conventional dynamic CMOS PLAs and static CMOS PLA. Also, the charge redistribution problem by internl delay is solved. The internal clock generator generates four internal clocks that drive all the dynamic CMOS circuits. During evaluation, two clocks of them are delayed as compared with others. Therefore the race problem is completoly eliminated. The internal clock generator also prevents the reduction of circuit output voltage and noise margin due to leakage current and charge coupling without any penalty in circuit operating speed or chip area utilization.