• Title/Summary/Keyword: cost table

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An Efficient Hardware Architecture of Coordinate Transformation for Panorama Unrolling of Catadioptric Omnidirectional Images

  • Lee, Seung-Ho
    • Journal of IKEEE
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    • v.15 no.1
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    • pp.10-14
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    • 2011
  • In this paper, we present an efficient hardware architecture of unrolling image mapper of catadioptric omnidirectional imaging systems. The catadioptric omnidirectional imaging systems generate images of 360 degrees of view and need to be transformed into panorama images in rectangular coordinate. In most application, it has to perform the panorama unrolling in real-time and at low-cost, especially for high-resolution images. The proposed hardware architecture adopts a software/hardware cooperative structure and employs several optimization schemes using look-up-table(LUT) of coordinate conversion. To avoid the on-line division operation caused by the coordinate transformation algorithm, the proposed architecture has the LUT which has pre-computed division factors. And then, the amount of memory used by the LUT is reduced to 1/4 by using symmetrical characteristic compared with the conventional architecture. Experimental results show that the proposed hardware architecture achieves an effective real-time performance and lower implementation cost, and it can be applied to other kinds of catadioptric omnidirectional imaging systems.

A PMSM Motion Control System with Direct Torque Control (직접토크제어에 의한 PMSM의 위치제어 시스템)

  • 김남훈
    • Proceedings of the KIPE Conference
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    • 2000.07a
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    • pp.615-619
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    • 2000
  • This paper presents an implementation of digital motion control system of Surface Permanent-Magnet Synchronous Motor(SPMSM) vector drives with a direct torque control(DTC) using the 16bit DSP TMS320F240 The DSP controller enable enhanced real time algorithm and cost-effective design of intelligent control for motors which can be yield enhanced operation fewer system components lower system cost increased efficiency and high performance The system presented are stator flux and torque observer of stator flux feedback model that inputs are current and voltage sensing of motor terminal and angle for a low speed operating area two hysteresis band controllers an optimal switching look-up table and IGBT voltage source inverter by using fully integrated control software. The developed control system are shown a good motion control response characteristic results and high performance features using 1.0Kw purposed servo drive SPMSM.

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Digital Control System for Induction Motor Drive Using DSP (DSP를 이용한 유도전동기 디지털 제어시스템)

  • Kim, Min-Huei;Kim, Nam-Hun
    • Journal of the Korean Society of Industry Convergence
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    • v.3 no.1
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    • pp.9-15
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    • 2000
  • This paper presents a implementation of digital motion control system for induction motor vector drives using the 16bit DSP TMS320F240. The DSP controller enable enhanced real time algorithm and cost-effective design of intelligent controllers for motors which can be yield enhanced operation, fewer system components, lower system cost, increased efficiency and high performance. The system presented are speed and current sensing, sine look-up table and generated SVPWM by fully integrated control software. The developed system in a implementation are shown a good speed response and motion control characteristic results, and high performance features in general purposed 2.2[kW] machine. The system can be adapted variform motor drive system.

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Logic synthesis for TLU-type FPGA (TLU형 FPGA를 위한 논리 설계 알고리즘)

  • 박장현;김보관
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.10
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    • pp.177-185
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    • 1996
  • This paper describes several algorithms for technolgoy mapping of logic functions into interesting and popular FPGAs that use look-up table memories. In order to improved the technology mapping for FPGA, some existing multi-level logic synthesis, decomposition reduction and packing techniques are analyzed and compared. And then new algorithms such as merging fanin, unified reduction and multiple disjoint decomposition which are used for combinational logic design, are proposed. The cost function is used to minimize the number of CLBs and edges of the network. The cost is a linear combination of each weight that is given by user. Finally we compare our new algorithm with previous logic design technique. In an experimental comparison our algorithm requires 10% fewer CLB and nets than SIS-pga.

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Digital Control System for Induction Motor Drive Using F240DSP (F240DSP 이용한 유도전동기 디지털 제어시스템)

  • 김남훈;김동희;이상호;이상석;김민회
    • Proceedings of the KIPE Conference
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    • 1999.07a
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    • pp.377-381
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    • 1999
  • This paper presents a implementation of digital motion control system for induction motor vector drives using the 16bit DSP TMS320F240. The DSP controller enable enhanced real time algorithm and cost-effective design of intelligent controllers for induction motors which can be yield enhanced operation, fewer system components, lower system cost, increased efficiency and high performance. The system presented are speed and current sensing, sine look-up table and generated SVPWM by fully integrated control software. The developed system in a implementation are shown a good speed response characteristic results and high performance features. The system can be adapted variform motor drive system.

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An Induction Motor Control System with Direct Torque and Flux Control (직접 토크 및 자속제어에 의한 유도전동기 제어시스템)

  • Kim, Min-Huei;Kim, Nam-Hun;Kim, Min-Ho
    • Proceedings of the KIEE Conference
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    • 2000.07e
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    • pp.79-84
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    • 2000
  • This paper presents an implementation of digital position control system for an induction motor vector drives by a direct torque control(DTC) using the 16bit DSP TMS320 F240. The DSP controller enable enhanced real time algorithm and cost-effective design of intelligent controller for motors which can be yield enhanced operation, fewer system components, lower system cost, increased efficiency and high performance. The system presented are stator flux and torque observer using current model that inputs are current sensing of motor terminal and rotor angle for a low speed operating area, two hysteresis controller, optimal switching look-up table, and IGBT voltage source inverter by fully integrated control software. The developed control system are shown a good motion control response characteristic results and high performance features using 2.2Kw general purposed induction motor.

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A Control System Design for the Line-of-Sight Stabilization based on Low-Cost Inertial Sensors (저가 관성센서 기반의 시선안정화 제어시스템 설계)

  • 위정현;홍성경
    • Journal of Institute of Control, Robotics and Systems
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    • v.9 no.3
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    • pp.204-209
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    • 2003
  • The line-of-sight stabilization system is an equipment which is loaded on a vehicle and stabilizes the direction of the line-of-sight of the vision sensor to obtain a not-swayed image in the existence of external disturbances. To obtain accurate Euler angles and angular velocities simultaneously we usually need a control system which uses high-price inertial sensors including Vertical Gyro(VG) or Rate Integrating Gyro(RIG). In this paper, we design and implement a control system of a gimbal, which is a line-of-sight stabilization system using a low-cost mixed algorithm of a rate gyro and an accelerometer instead of a VG and a RIG. In the experiment where we laid the implemented line-of-sight stabilization system on the rate table. we can see the stabilized performance to external disturbances.

Optimization of Magnet Pole of BLDC Motor by Experimental Design Method

  • Kim, Jee-Hyun;Kwon, Young-Ahn
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • v.3B no.2
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    • pp.84-89
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    • 2003
  • The finite element method (FEM) is typically used in the process of motor design. However, the FEM requires computation time, Therefore, decreasing the number of FEM simulations may also decrease the simulation cost. Several optimal design methods overcoming this problem have been recently studied. This paper investigates the optimal design of the magnet pole of a BLDC motor through reducing simulation cost. The optimization minimizes the magnet volume and limits the average and cogging torques to certain values. In this paper, the response surface methodology and Taguchi's table for reducing the number of FEM simulations are used to approximate two constraints. The optimization result shows that the presented strategy is satisfactorily performed.

Multi-path Routing Policy for Content Distribution in Content Network

  • Yang, Lei;Tang, Chaowei;Wang, Heng;Tang, Hui
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.5
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    • pp.2379-2397
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    • 2017
  • Content distribution technology, which routes content to the cache servers, is considered as an effective method to reduce the response time of the user requests. However, due to the exponential increases of content traffic, traditional content routing methods suffer from high delay and consequent inefficient delivery. In this paper, a content selection policy is proposed, which combines the histories of cache hit and cache hit rate to collaboratively determine the content popularity. Specifically, the CGM policy promotes the probability of possible superior paths considering the storage cost and transmission cost of content network. Then, the content routing table is updated with the proportion of the distribution on the paths. Extensive simulation results show that our proposed scheme improves the content routing and outperforms existing routing schemes in terms of Internet traffic and access latency.

Computer Aided Design of Sequential Logic Circuits (Case of Synchronous Sequential Logic Circuits) (컴퓨터를 이용한 순차 논리 회로의 설계 (동기식 순차 논리 회로의 경우))

  • 김경식;조동섭;황희영
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.33 no.4
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    • pp.134-139
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    • 1984
  • This paper presents the computer program to design the synchronous sequential logic circuit. The computer program uses the MASK method to get the circuit of optimal cost. The computer program takes as an input, the minimal reduced state transition table where each state has its internal code. As an output,the optimal design of synchronous sequential logic circuit is generated for each flipflop type of JK,T,D, and RS respectively. And these circuits for 4 flipflop types are evaluated and sorted in ascending order of their costs, so that the user can select the proper flipflop type and its circuit. Furthermore,the proposed computer program may be applied to state assignment with its facility of cost evaluation.

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