• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.6
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• pp.1058-1064
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• 2009

According to development of Information Technology and generalization of internet, practical use field of geography information became various. Therefor various Geographic Information System (GIS) constructed to manage geography information efficiently. However, geography information data of various form is depending on graphic authorizing tool of various form being not normalized each other. So, OGC(Open Geospatial Consortium) proposed GML(Geography Markup Language) that describe normalized geography information data that can apply mutually and W3C proposed SVG(Scalable Vector Graphics) of vector base. In this paper creates GML data of XML base for geography information data processing to vector graphic object, and design and implementation of GML document editing and translation system that define code converter that create GML document through created graphic objects and change vector graphic to logic structure of XML base.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.42 no.6
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• pp.522-528
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• 2014

A UHF/VHF full-duplex communication using monopole and dipole antenna has been widely used for cube satellite applications. This kind of communication system requires a dedicated structure panel for antenna integration, which is the one of the disadvantages of the conventional communication system from the accommodation point of view considering the extremely limited volume of the cube satellite. In this study, to maximize the accommodation efficiency of the cube satellite, the commercial UHF half-duplex antenna combined with buck converter for communication modes transition has been considered in the communication system design. Its effectiveness has been verified through link budget analysis based on the antenna specifications and satellite's operation conditions. In addition, the antenna deployment mechanism for the synchronous release of multi-antennas has also been introduced.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.203-205
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• 2006

This paper presents a novel soft-switching PWM utility frequency AC to high frequency AC power conversion circuit incorporating boost-half-bridge inverter topology, which is more suitable and acceptable for cost effective consumer induction heating applications. The operating principle and the operation modes are presented using the switching mode and the operating voltage and current waveforms. The performances of this high-frequency inverter using the latest IGBTs are illustrated, which includes high frequency power regulation and actual efficiency characteristics based on zero voltage soft switching (ZVS) operation ranges and the power dissipation as compared with those of the previously developed high-frequency inverter. In addition, a dual mode control scheme of this high frequency inverter based on asymmetrical pulse width modulation (PWM) and pulse density modulation (PDM) control scheme is discussed in this paper in order to extend the soft switching operation ranges and to improve the power conversion efficiency at the low power settings. The power converter practical effectiveness is substantially proved based on experimental results from practical design example.

• Journal of Power Electronics
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• v.16 no.2
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• pp.464-472
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• 2016

This study applies the selective harmonic elimination (SHE) technique to design and operate a regulated AC/DC/AC power supply suitable for maritime military applications and underground trains. The input is a single 50/60 Hz AC voltage, and the output is a 400 Hz regulated voltage. The switching angles for a multi-level inverter and transformer turns ratio are determined to operate with special connected transformers with equal power ratings and produce an almost sinusoidal current. As a result of its capability of directly controlling harmonics, the SHE technique is applicable to apparatus with congenital immunity to specific harmonics, such as series-connected transformers, which are specially designed to equally share the total load power. In the present work, a single-phase 50/60 Hz input source is rectified via a semi-controlled bridge rectifier to control DC voltage levels and thereby regulate the output load voltage at a constant level. The DC-rectified voltage then supplies six single-phase quazi-square H-bridge inverters, each of which supplies the primary of a single-phase transformer. The secondaries of the six transformers are connected in series. Through off-line calculation, the switching angles of the six inverters and the turns ratios of the six transformers are designed to ensure equal power distribution for the transformers. The SHE technique is also employed to eliminate the higher-order harmonics of the output voltage. A digital implementation is carried out to determine the switching angles. Theoretical results are demonstrated, and a scaled-down experimental 600 VA prototype is built to verify the validity of the proposed system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.8
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• pp.1464-1474
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• 1994

GPS(Global Positioning System)is a satellite-based navigation system that we can survey where we are, anywhere and anytime. In this paper, delay-lock loop of the receiver which detects the navigation data is theoretically analyzed, and designed using the digital logic circuit. Also logic operations for the synchronization are analyzed. The designed system consists of the correlator which correlates the received C/A code and the generated C/A code in the receiver, the C/A code generator which generates C/A code of selected satellite, and the direct digital clock syntheizer which generates the clock of the C/A code generator to control the C/A code phase and clock rate. From the analyses results of the proposed digital delay-lock loop system, the system has the detection propertied over 90% when its input signal power is above-113.98dB. The influence of input signal variation of digital delay loop, which is the input of A/D converter, is investigated and the performance is analyzed with the variation of threshold level via the computer simulation. The logic simulation results show that the designed system detects precisely the GPS navigation data.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.7A
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• pp.545-551
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• 2012

In this paper, K-band multi-channel receiver was designed and fabricated for low noise amplification and down conversion to L-band. The fabricated multi-channel receiver incorporates GaAs-HEMT LNA(Low noise amplifier) which provides less than a 2 dB noise figure, IR(Image Rejection) Filter for rejection of image frequency, IR(Image rejection) mixer to reject a image frequency and improve an IMD(Intermodulation Distortion) characteristic. Test results of the fabricated multi-channel receiver show less than a 3.8 dB noise figure, conversion gain of more than 27dB, and IP1dB(Input 1dB Gain Compression Point) of -9.5 dB and over.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.1B
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• pp.183-192
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• 2000

In this paper, the dual looped CMOS PLL with 3-250MHz input locking range at a single 13.3V is designed. This paper proposed a new PLL architecture with a current pumping algorithm to improve voltage-to-frequencylinearity of VCO(Voltage Controlled Oscillator). The designed VCO operates at a wide frequency range of75.8MHz-lGHz with a high linearity. Also, PFD(Phase frequency Detector) circuit preventing voltage fluctuation of the charge pump with loop filter circuit under the locked condition is designed. The simulation results of the PLL using 0.6 um N-well single poly triple metal CMOS technology illustrate a locking time of 3.5 us, a power dissipation of 92mW at 1GHz operating frequency with 125MHz of input frequency. Measured results show that the phase noise of VCO with V-I converter is -100.3dBc/Hz at a 100kHz offset frequency.

• Journal of Biomedical Engineering Research
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• v.10 no.2
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• pp.139-150
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• 1989

A new motor-driven blood pump for artificial heart was developed. In this blood pump, a small size, high torque brushless DC motor was used as an energy converter and the motor rolls back and forth on a circular track. This movement of the "rolling-cyliner" causes blood ejection by alternately pushing left or right polyurethane blood sacs. This moving-actuator mechanism could be eliminate two potential problems of other motor-driven artificial hearts such as large size and poor anastomosis for the implantation. Theoretical analyses on the pump efficiency, the temperature rise, and the inflow mechanism were also performed. In a series of mock circulation tests, the theoretical analyses were compared to the measured hemodynamic and mechanical values. The pump system was shown to have sufficient cardiac output (upto 9 L/min), sensitivity to preload, and mechanical stability to be tested as an implantable total artificial heart.ial heart.

• Journal of the Institute of Convergence Signal Processing
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• v.14 no.4
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• pp.249-254
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• 2013

A fast multiplier and ADC are essential to process the analog signals in real time. The double-base number system(DBNS) is known as an efficient method for this purpose. The DBNS uses the numbers 2 and 3 as the base numbers simultaneously. The system has an advantage of fast multiplication, less chip area, and low power consumption compared to the binary multiplier. However, the inherent errors of the log number's intrinsic tolerance in DBNS are accumulated in a FIR digital filter, so the signal-to-noise ratio(SNR) has a tendency to be degraded. In this paper, the nonlinear encoder of ADC is designed to compensate the accumulated errors of DBNS by analysing the error distributions of various filter coefficients. The new ADC does not sacrifice its own advantages because the encoder circuits are modified only. The experiments were done with an FIR filters those were designed to have -70dB of SNR in stop band. The proposed nonlinear ADC encoder could drop the SNR to -45dB in stop band, in contrast to -35dB with the linear encoder.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.3 s.118
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• pp.257-264
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• 2007

In this paper, we have designed and fabricated a wide-band and high gain antenna which can integrate a standard of IEEE 802.1la$(5.15\sim5.25\;GHz,\;5.25\sim5.35\;GHz,\;5.725\sim5.825\;GHz)$. We inserted a parallel dual slot into a rectangular patch to have wide-band, and we offset an element of capacitance from the slot by using coaxial probe feeding method. We also designed a converter of $\lambda_g/4$ impedance with taper type line so that wide-band impedance can be matched easily. We finally designed structure with $2\times2$ array in order to improve the antenna gain, and the final fabricated antenna could have a good return loss(Return loss$\leq$-10 dB) and a high gain(over 13 dBi) at the range of $5.01\sim5.95\;GHz(B/W\doteqdot940\;MHz)$.