• Title/Summary/Keyword: communication latency

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Performance evaluation of WAVE communication systems under a high-speed driving condition in a highway (고속주행 환경에서의 WAVE 통신장치 성능분석)

  • Song, Yoo Seung;Lee, Sang Woo;Oh, Hyun Seo
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.12 no.3
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    • pp.96-102
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    • 2013
  • In recent years, a variety of ITS services are available such as driving information, road conditions, V2X messages as well as navigation and traffic jams notification. The development of ITS services is accelerating by V2X communication technologies for high-speed vehicles. In this paper, WAVE communication devices based on the IEEE802.11p standard is introduced as a solution of V2X communication technologies. The H/W and S/W structures of the WAVE communication device and the characteristics of RF/antenna are described. The performance is evaluated in the test road by measuring throughput, PER and latency. The implemented WAVE communication device has 6~7 Mbps throughput with 10% PER at 1km coverage. The packet latency is less than 3ms for the whole test road. It is shown that the implemented WAVE technology is satisfactory to provide ITS services and Internet video-streaming services.

Design of Hybrid V2X Communication Module for Cooperative Automated Driving (자율협력주행을 위한 하이브리드 V2X 통신모듈 설계)

  • Lim, Ki-taeg;Jin, Seong-keun;Kwak, Jae-min
    • Journal of Advanced Navigation Technology
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    • v.22 no.3
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    • pp.213-219
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    • 2018
  • In this paper, we propose a design method and process for hardware and software of hybrid V2X communication module that supports both C-ITS communication protocol designed for vehicle environment and Legacy LTE communication technology. C-ITS is suitable for safety service applications due to its low latency characteristics, and Legacy LTE is a technology suitable for non-safety applications such as traffic information and infotainment due to high latency and high capacity. The hybrid V2X communication module supports multiple communication technologies of WAVE and LTE, in which WAVE supports multiple channels, so that it is designed to transmit road information such as LDM and positioning correction information to an autonomous vehicle in real time. The main design results presented in this paper will be applied to the implementation of future hybrid V2X communication terminals for vehicles.

Handover Latency Improvement & Performance Analysis over Inter-LMA (Inter-LMA 이동시 Handover Latency 개선 방안 및 성능 분석)

  • Chang, Jae-Cheol;Park, Byung-Joo;Kim, Dae-Young
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.46 no.8
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    • pp.34-42
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    • 2009
  • Mobile communication traffic is changing from voice to data/internet, e.g. wireless internet access, SMS/MMS. more and more. Therefore many data services are coming out over 3G, Mobile WiMAX(WIBRO), LTE etc. Wireless internet market is growing and MIPv6 is more important and many protocols being studied and developed from MIPv6 to Fast MIPv6, Hierachical MIPv6, Proxy MIPv6, etc. The significant factor over MIPv6 is Hand-over latency and Packet-loss PMIPv6 is efficient for reducing mobility related messages and hand-over latency, but it considers single LMA domain. If mobile node is moving inter-LMAs, hand-over delay time affects the real-time communications. To overcome this hand-over delay, we propose present and new enhanced schemes and analize the performance and show the results.

Design of a Secure and Fast Handoff Method for Mobile If with AAA Infrastructure (AAA 기반 Mobile IP 환경에서 안전하고 빠른 핸드오프 기법 설계)

  • 김현곤
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.14 no.1
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    • pp.79-89
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    • 2004
  • Mobile IP Low Latency Handoffs allow greater support for real-time services on a Mobile W network by minimizing the period of time when a mobile node is unable to send or receive IP packets due to the delay in the Mobile IP Registration process. However, on Mobile IP network with AAA servers that are capable of performing Authentication, Authorization, and Accounting(AAA) services, every Registration has to be traversed to the home network to achieve new session keys, that are distributed by home AAA server, for a new Mobile IP session. This communication delay is the time taken to re-authenticate the mobile node and to traverse between foreign and home network even if the mobile node has been previously authorized to old foreign agent. In order to reduce these extra time overheads, we present a method that performs Low Latency Handoffs without requiring funker involvement by home AAA server. The method re-uses the previously assigned session keys. To provide confidentiality and integrity of session keys in the phase of key exchange between agents, it uses a key sharing method by gateway foreign agent that Performs a ousted thirty party. The Proposed method allows the mobile node to perform Low Latency Handoffs with fast as well as secure operation

A CDMA-Based Communication Network for a Multiprocessor SoC (다중 프로세서를 갖는 SoC 를 위한 CDMA 기술에 기반한 통신망 설계)

  • Chun, Ik-Jae;Kim, Bo-Gwan
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.707-710
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    • 2005
  • In this paper, we propose a new communication network for on-chip communication. The network is based on a direct sequence code division multiple access (DS-CDMA) technique. The new communication network is suitable for a parallel processing system and also drastically reduces the I/O pin count. Our network architecture is mainly divided into a CDMA-based network interface (CNI), a communication channel, a synchronizer. The network includes a reverse communication channel for reducing latency. The network decouples computation task from communication task by the CNI. An extreme truncation is considered to simplify the communication link. For the scalability of the network, we use a PN-code reuse method and a hierarchical structure. The network elements have a modular architecture. The communication network is done using fully synthesizable Verilog HDL to enhance the portability between process technologies.

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Design and Implementation of Kernel Binder Cache for Accelerating Android IPC (안드로이드 IPC 가속화를 위한 커널 바인더 캐쉬의 설계 및 구현)

  • Yeon, Jeseong;Koh, Kern;Lee, Eunji
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.16 no.5
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    • pp.33-38
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    • 2016
  • In Android platform, as applications invoke various service functions through IPC (Inter-Process Communication), IPC performance is critical to the responsiveness in Android. However, Android offers long IPC latency of hundreds of micro-seconds due to complicated software stacks between the kernel Binder and the user-level process Context Manager. This separation provides modularity and flexibility, but degrades the responsiveness of services owing to additional context switching and inefficient request handling. In this paper, we anatomize Android IPC mechanisms and observe that 55% of IPC latency comes from the communication overhead between Binder and Context Manager. Based on this observation, this paper proposes a kernel Binder cache that retains a popular subset of service function mappings, thereby reducing the requests transferred to the user-level daemon. The proposed Binder cache is implemented in Android 5.0 and experimental results with various benchmarks show that the proposed cache architecture improves performance by 52.9% on average.

Implementation of a Window-Masking Method and the Soft-core Processor based TDD Switching Control SoC FPGA System (윈도 마스킹 기법과 Soft-core Processor 기반 TDD 스위칭 제어 SoC 시스템 FPGA 구현)

  • Hee-Jin Yang;Jeung-Sub Lee;Han-Sle Lee
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.17 no.3
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    • pp.166-175
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    • 2024
  • In this paper, the Window-Masking Method and HAT (Hardware Attached Top) CPU SoM (System on Module) are used to improve the performance and reduce the weight of the MANET (Mobile Ad-hoc Network) network synchronization system using time division redundancy. We propose converting it into a RISC-V based soft-core MCU and mounting it on an FPGA, a hardware accelerator. It was also verified through experiment. In terms of performance, by applying the proposed technique, the synchronization acquisition range is from -50dBm to +10dBm to -60dBm to +10dBm, the lowest input level for synchronization is increased by 20% from -50dBm to -60dBm, and the detection delay (Latency) is 220ns. Reduced by 43% to 125ns. In terms of weight reduction, computing resources (48%), size (33%), and weight (27%) were reduced by an average of 36% by replacing with soft-core MCU.

Small Cell Communication Analysis based on Machine Learning in 5G Mobile Communication

  • Kim, Yoon-Hwan
    • Journal of Integrative Natural Science
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    • v.14 no.2
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    • pp.50-56
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    • 2021
  • Due to the recent increase in the mobile streaming market, mobile traffic is increasing exponentially. IMT-2020, named as the next generation mobile communication standard by ITU, is called the 5th generation mobile communication (5G), and is a technology that satisfies the data traffic capacity, low latency, high energy efficiency, and economic efficiency compared to the existing LTE (Long Term Evolution) system. 5G implements this technology by utilizing a high frequency band, but there is a problem of path loss due to the use of a high frequency band, which is greatly affected by system performance. In this paper, small cell technology was presented as a solution to the high frequency utilization of 5G mobile communication system, and furthermore, the system performance was improved by applying machine learning technology to macro communication and small cell communication method decision. It was found that the system performance was improved due to the technical application and the application of machine learning techniques.

Modeling & Analysis of the System Bus on the SoC Platform (SoC 플랫폼에서 시스템 버스의 모델링 및 해석)

  • Cho Young-shin;Lee Je-hoon;Cho Kyoung-rok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.12
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    • pp.35-44
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    • 2005
  • SoC(systnn-on-a-chip) requires high bandwidth system bus for performing multiple functions. Performance of the system is affected by bandwidth of the system bus. In this paper, for efficient management of the bus resource on a SoC platform, we present a latency model of the shared bus organized by multiple layers. Using the latency model, we can analyze latencies of the shared bus on a SoC. Moreover we evaluate a throughput of the bus and compare with needed throughput of the SoC platform including IPs such as MPEG or USB 2.0. And we can use the results as a criteria to find out an optimal bus architecture for the specific SoC design. For verifying accuracy of the proposed model, we compared the latencies with the simulation result from MaxSim tools. As the result of simulation, the accuracy of the IS model for a single layer and multiple layer are over $96\%\;and\;85\%$ respectively.

Two-phase Multicast in Wormhole-switched Bidirectional Banyan Networks (웜홀 스위칭하는 양방향 베니언 망에서의 두 단계 멀티캐스트)

  • Kwon, Wi-Nam;Kwon, Bo-Seob;Park, Jae-Hyung;Yun, Hyeon-Su
    • Journal of KIISE:Computer Systems and Theory
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    • v.27 no.3
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    • pp.255-263
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    • 2000
  • A multistage interconnection network is a suitable class of interconnection architecture for constructing large-scale multicomputers. Broadcast and multicast communication are fundamental in supporting collective communication operations such as reduction and barrier synchronization. In this paper, we propose a new multicast technique in wormhole-switched bidirectional multistage banyan networks for constructing large-scale multicomputers. To efficiently support broadcast and multicast with simple additional hardware without deadlock, we propose a two-phase multicast algorithm which takes only two transmissions to perform a broadcast and a multicast to an arbitrary number of desired destinations. We encode a header as a cube and adopt the most upper input link first scheme with periodic priority rotation as arbitration mechanism on contented output links. We coalesce the desired destination addresses into multiple number of cubes. And then, we evaluate the performance of the proposed algorithm by simulation. The proposed two-phase multicast algorithm makes a significant improvement in terms of latency. It is noticeable that the two-phase algorithm keeps broadcast latency as efficient as the multicast latency of fanout 2^m where m is the minimum integer satisfying $2^m{\geq} {\sqrt{N}}$ ( N is a network size).

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