• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.10
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• pp.2367-2372
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• 2015

One of various low-density parity-check(LDPC) codes that has been adopted in many communication standards due to its error correction ability is a quasi-cyclic LDPC(QC-LDPC) code, which leads to comparable decoder complexity. One of the main blocks in the QC-LCDC code decoder is a multi-size circular shifter(MSCS) that can perform various size rotation. The MSCS can be implemented with many structures, one of which is based on Banes network. The Benes network structure can perform the normal MSCS operation efficiently, but it cannot use the properties coming from specifications like rotation sizes. This paper proposesd a scheme where the Benes network structure can use the rotation size property with the modification of the control signal generation. The proposed scheme is applied to the MSCS of IEEE 802.16e WiMAX QC-LDPC decoder to reduce the number of MUXes and the critical path delay.

• Journal of the Optical Society of Korea
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• v.6 no.4
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• pp.172-179
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• 2002

Like the conventional digital storage systems, volume holographic memory can be deteriorated by burst errors due to its high-density storage characteristics. These burst errors are used byoptical defects such as scratches, dust particles, etc. and are two-dimensional in a data page. To deal with these errors, we introduce some concepts for describing them and propose efficient two- dimensional interleaving schemes. The schemes are two-dimensional lattices of an error-correction code word and have equilateral triangular and square structures. Using these structures, we can minimize the number of code words that are interleaved and improve the efficiency of the system. For large size burst errors, the efficient interleaving structure is an equilateral triangular lattice. However, for some small size burst errors, it is reduced to a square lattice.

• Proceedings of the IEEK Conference
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• 2000.06a
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• pp.252-255
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• 2000

In this paper, a fast pseudo-noise (PN) code acquisition with novel adaptive architecture is presented in direct-sequence spread- spectrum (DS-SS) systems. Since an existing acquisition system has a fixed correlation tap size and threshold value, this system cannot adapt to various mobile communication environments and results in a low detection probability or a high false alarm rate and long acquisition time. Therefore, if a correlation tap size and a threshold value can be controlled adaptively according to received signals, problems of ail existing system will be solved. The system parameter varies adaptively by using constant false alarm rate (CFAR) algorithm well known in a field of detection and proposed signal-to-noise ratio (SNR) measurement system. By deriving formulas of the proposed system, the performance is analyzed.

• Journal of information and communication convergence engineering
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• v.7 no.2
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• pp.164-169
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• 2009

An RFID system consists of radio frequency tags attached to objects that need to be identified and one or more electromagnetic readers. Unlike the traditional bar code system, the great benefit of RFID technology is that it allows information to be read without requiring contact between the tag and the reader. For this contact-less feature, RFID technology in the near future will become an attractive alternative to bar code in many application fields. In almost all the 13.56MHz RFID systems, FSA (Framed Slot ALOHA) algorithm is used for identifying multiple tags in the reader's identification range. In FSA algorithm, the tag identification time and system efficiency depend mainly on the number of tags and frame size. In this paper, we propose a tag number estimation scheme and a dynamic frame size allocation scheme based on the estimated number of tags.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.61-64
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• 1999

The turbo code appropriate to IMT-2000 is known to have a good performance whenever the size of frame increases. But it is not appropriate to a sort of video service to need real time because of decoding complexity and long delay time by the size of frame. Therefore this paper proposes decoding decision algorithm of short frame in which soft output is weighted according to iteration number in turbo decoder. Performance of the proposed algorithm is analysed in the AWGN channel when short length of frame is 100, 256, 640. As the result. it is appeared that the proposed decoding decision algorithm has improved in BER other than in the existing MAP decoding algorithm.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.105-108
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• 2001

4 32-bit RISC core is designed for embedded application and DSP. This processor offers low power consumption by fully static operation and compact code size by efficient instruction set. Processor performance is improved by wing conditional instruction execution, block data transfer instruction, multiplication instruction, bunked register file structure. To support compact code size of embedded application, It is capable cf executing both 16-bit instructions and 32-bit instruction through mixed mode instruction conversion Furthermore, for fast MAC operation for DSP applications, the processor has a dedicated hardware multiplier, which can complete a 32-bit by 32-bit integer multiplication within seven clock cycles. These result in high instruction throughput and real-time interrupt response. This chip is implemented with 0.35${\mu}{\textrm}{m}$, 4- metal CMOS technology and consists of about 50K gate equivalents.

• Proceedings of the Korean Institute of Building Construction Conference
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• 2017.05a
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• pp.200-201
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• 2017

Generally, a lot of reinforcements are used in nuclear power plant concrete structures, and it may cause several potential problems when concrete is poured. Because of the congestion caused by hooked bars, embedded materials, and other reinforcements, it is too difficult to pour concrete into structural member joint area. The purpose of this study is to change ACI 349 Code for using the large-size(57mm) and high-strength(Gr.80) headed deformed bars instead of standard hooked bars in nuclear power plant concrete structures in order to solve the congestion problems.

• Transactions of Materials Processing
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• v.17 no.2
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• pp.117-123
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• 2008

In this study, optimum processing condition of rolled AZ31 Mg alloy was investigated by utilizing processing map and constitutive equation considering microstructure evolution(dynamic recrystallization) occurring during hot-working. A series of mechanical tests were conducted at various temperatures and strain rates to construct a processing map and to formulate the recrystallization kinetics in terms of grain size. Dynamic recrystallization(DRX) was observed to occur at a domain of $250^{\circ}C$ and 1/s(maximum dissipation-efficiency region). The effect of DRX kinetics on microstructure evolution was implemented in a commercial FEM code followed by remapping of the state variables. The volume fraction and grain size of deformed part were predicted using a modified FEM code and were compared with those of actual hot forged part. A good agreement was observed between the experimented results and predicted ones.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.397-397
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• 2011

In a low aspect ratio (LAR) tokamak reactor with a superconducting toroidal field (TF) coil, the radial build of TF coil and the shield play a key role in determining the size of a reactor. For self-consistent determination of the reactor components and physics parameters, a system analysis code is coupled with one-dimensional radiation transport code. Conceptual design study of a compact superconducting LAR tokamak reactor with aspect ratio less than 2.5 was conducted and the optimum radial build was identified. It is shown that the use of an improved shielding material and high temperature superconducting magnets with high critical current density opens up the possibility of a fusion power plant with compact size and small re-circulating power simultaneously at low aspect ratio, and that by using an inboard neutron reflector instead of breeding blanket, tritium self-sufficiency is possible with outboard blanket only and thus compact sized reactor is viable.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.05a
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• pp.149-151
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• 2006

The surface properties of electrical devices studied by fractal phenomenon were investigated. The SEM photographs of devices surface were changed by binary code and it were analyzed by fractal dimension. The void of devices surface was found by fractal program. The relation between grain density and electrical properties are able to expect to fractal dimension. The grain size in varistors surface was decreased by increasing of oxide antimony addition. The fractal dimension and electrical properties of devices surface was related to between grain boundary and grain density. The grain size was decreased by increasing of fractal dimensions.