• Journal of the Korea Academia-Industrial cooperation Society
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• v.20 no.7
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• pp.423-429
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• 2019

Recently, a variety of methods for the performance improvement of ultra-high speed wideband wireless transmission systems have been suggested. This paper proposes a space-frequency (SF) block coded single side band (SSB) single carrier (SC)-frequency division multiple access (FDMA) transmission system. In the proposed SSB SC-FDMA system, SF block code is implemented with the complex conjugates, which are formed from discrete Fourier transform (DFT) spreading of pulse amplitude modulation (PAM) signals. As a result, transmit diversity gain can be obtained in the proposed SF block coded SSB SC-FDMA system without any significant increase of the system computational complexity. The simulation result shows that the signal-to-noise power ratio (SNR) performance of the proposed SF block coded SSB SC-FDMA system is approximately 4 dB better than the SNR performance of the conventional SSB SC-FDMA system with single transmit antenna at a symbol error rate (SER) of $10^{-2}$.

• The Journal of the Convergence on Culture Technology
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• v.9 no.2
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• pp.475-481
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• 2023

Softwares, especially like machine learning applications, affect human's life style tremendously. Accordingly, the importance of the cost model for softwares increases rapidly. As cost models, LOC(Line of Code) and M/M(Man-Month) estimates the quantitative aspects of the software. Differently from them, FP(Function Point) focuses on estimating the functional characteristics of software. FP is efficient in the aspect that it estimates qualitative characteristics. FP, however, has a limit for evaluating machine learning softwares because FP does not evaluate the critical factors of machine learning software. In this paper, we propose an extended function point(ExFP) that extends FP to adopt hyper parameter and the complexity of its optimization as the characteristics of the machine learning applications. In the evaluation reflecting the characteristics of machine learning applications. we reveals the effectiveness of the proposed ExFP.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.78-89
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• 2013

This paper proposes a high-throughput and multi-mode quasi-cyclic (QC) low-density parity-check (LDPC) decoder based on a fully parallel structure. The proposed QC-LDPC decoder employs the fully parallel structure to provide very high throughput. The high interconnection complexity, which is the general problem in the fully parallel structure, is solved by using a broadcasting-based sum-product algorithm and proposing a low-complexity cyclic shift network. The high complexity problem, which is caused by using a large amount of check node processors and variable node processors, is solved by proposing a combined check and variable node processor (CCVP). The proposed QC-LDPC decoder can support the multi-mode decoding by proposing a routing-based interconnection network, the flexible CCVP and the flexible cyclic shift network. The proposed QC-LDPC decoder is operated at 100 MHz clock frequency. The proposed QC-LDPC decoder supports multi-mode decoding and provides 8.1 Gbps throughput for a (1944, 1620) QC-LDPC code.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.12
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• pp.2783-2790
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• 2010

In this paper, we first review LDPC codes in general and a belief propagation algorithm that works in logarithm domain. LDPC codes, which is chosen 802.11n for wireless local access network(WLAN) standard, require a large number of computation due to large size of coded block and iteration. Therefore, we presented three kinds of low computational algorithms for LDPC codes. First, sequential decoding with partial group is proposed. It has the same H/W complexity, and fewer number of iterations are required with the same performance in comparison with conventional decoder algorithm. Secondly, we have apply early stop algorithm. This method reduces number of unnecessary iterations. Third, early detection method for reducing the computational complexity is proposed. Using a confidence criterion, some bit nodes and check node edges are detected early on during decoding. Through the simulation, we knew that the iteration number are reduced by half using subset algorithm and early stop algorithm is reduced more than one iteration and computational complexity of early detected method is about 30% offs in case of check node update, 94% offs in case of check node update compared to conventional scheme. The LDPC decoder have been implemented in Xilinx System Generator and targeted to a Xilinx Virtx5-xc5vlx155t FPGA. When three algorithms are used, amount of device is about 45% off and the decoding speed is about two times faster than convectional scheme.

• Proceedings of the KSME Conference
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• 2007.05b
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• pp.3529-3533
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• 2007

The advantages of the SITVC(secondary injection thrust vector control) technique over mechanical thrust vector systems include a reduction in both the nozzle weight and complexity due to the elimination of the mechanical actuators that are used in conventional vectoring. Computational study is performed to understand the fluidic thrust vectoring control of an axisymmetric nozzle, in which secondary gas injection is made in the divergent section of the nozzle. The nozzle has a design mach number 3. The effect of injection hole number and shape of secondary jet on the mach number distribution of SITVC were investigated. The standard ${\kappa}$ - ${\epsilon}$ turbulence model solved the complex three-dimensional nozzle flows perturbed by the secondary gas jet. The numerical code was validated by experiment. The results showed that the mach number distribution of circular and square nozzle are similar each other. As number of second injection hole increasing, a effect of deflection was decreased.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.4C
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• pp.191-199
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• 2005

Space-time turbo codes have been studied extensively as a powerful and bandwidth efficient error correction code over the wireless communication environment. In this paper, the efficient algorithm for decoding space-time turbo codes is proposed. The proposed method reduces the computational complexity by approximating a prior information for a iterative decoder. The performance of space-time turbo codes is also analyzed by using the fixed point implementation and the efficient method for approximating the Log-MAP algorithm is proposed. It is shown that the BER performance of the proposed method is close to that of the Log-MAP algorithm.

• Journal of KIISE:Software and Applications
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• v.27 no.6
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• pp.595-606
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• 2000

Software metrics evaluate the development process, measure the software development effort, and control the software quality effectively. Moreover in a current status to emphasize reusability, it is necessary to study of cohesion and coupling that plays an important role in evaluating reusability. Object oriented methodology to use the concept like encapsulation, inheritance, and polymorphism demands metrics that are different from existing procedural methodology, so a study for object oriented metrics is in progress at the present time. In this paper, we propose cohesion and coupling metrics for object oriented program, evaluate the proposed metrics by using the complexity properties proposed by Weyuker and Briand, and extract cohesion and coupling from C++ code.

• ETRI Journal
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• v.29 no.2
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• pp.143-152
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• 2007

In this paper, we propose a time-varying modified minimum mean-squared error (MMSE) detector for the detection of higher data rate signals in a multirate asynchronous code-division multiple-access (CDMA) system which is signaled in a fast Rayleigh fading channel. The interference viewed by a higher data rate symbol will be periodic due to the presence of a lower data rate symbol which spans multiple higher data rate symbols. The detection is carried out on the basis of a modified MMSE criterion which incorporates differential detection and the ratio of channel coefficients in two consecutive observation intervals inherently compensating the fast variation of the channel due to fading. The numerical results obtained by the MMSE detector with time-varying detection show around 3 dB (M=2) and 6 dB (M=4) performance improvement at a BER of $10^{-3}$ in the AWGN channel, while introducing more computational complexity than the MMSE detector without time-varying detection. At a higher $E_b/N_0$, the proposed scheme can achieve a BER of approximately $10^{-3}$ in the presence of fast channel variation which is an improvement over other schemes.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.1962-1965
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• 2004

In this paper, the new algorithm for blind adaptive decorrelating parallel interference canceller detector in direct-sequence code division multiple access (DS-CDMA) synchronous communication systems is proposed. The goal of this paper is to improve the performance of the blind adaptive decorrelating parallel interference cancellation detector (BAD/PIC). The proposed blind adaptive decorrelating detector is using optimum step-size technique bootstrap algorithm as an initial stage of PIC, which does not require a training sequence. Therefore, this algorithm has a superior view of utilizing bandwidth and reduces the complexity of computation of inversion cross-correlation matrix. The computer simulation results show that the bit error rate performance of the proposed algorithm for the new structure of detector is better than that of the other detectors such as matched filters, the conventional PIC, and the blind adaptive decorrelating PIC detector.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.579-587
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• 2014

This paper presents a variable gain amplifier (VGA) for an analog front-end (AFE) of ultrasound medical imaging. This VGA has a closed-loop topology and shows a 37-dB-linear characteristic with a single-stage amplifier. It consists of an op-amp, a non-binary-weighted capacitor array, and a gain-control block. This non-binary-weighted capacitor array reduces the required number of capacitors and the complexity of the gain-control block. The VGA has been fabricated in a 0.35-mm CMOS process. This work gives the largest gain range of 37 dB per stage, the largest P1 dB of 9.5 dBm at the 3.3-V among the recent VGA circuits available in the literature. The voltage gain is controlled in the range of [-10, 27] dB in a linear-in-dB scale with 16 steps by a 4-bit digital code. The VGA has a bandpass characteristic with a passband of [20 kHz, 8 MHz].