• Title/Summary/Keyword: code complexity

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A Study on the Implementation of a High Speed Synchronization Circuit Applied in Frequency Hopping FSK Tranceiver (주파수 도약 통신방식 FSK 송수신기의 고속동기회로 구현에 관한 연구)

  • 이준호;전동근;차균현
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.17 no.1
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    • pp.38-46
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    • 1992
  • In this thesis, a high speed code synchronization circuit is implemented, which is applicable to frequency hopping FSK tranceiver within 68-88 MIBz band- width. synchronization Process consists of two steps, initial synchronization and tracking. A modified matched filter method using two channel passive correlators matched with short hopping frequencies, synchronization prcfix. is proposed for initial synchronization. To increase probability of initial synchronization, prefix are transmitted repeatedly. The outputs of correlators are sent to synchronization decision circuit, and code start time Is extracted by synchronizatlon decision circuit-Modified matched fitter method makes it possible to reduce complexity in hardware and obtain code acquisition rapidly.Clock recovery circuit regenerates PN code clock for tracking.

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(0, k) Run-Length Limited(RLL) Data Compression Codes for Digital Storage Systems (디지털 저장시스템을 위한 (0, k) RLL 데이터 압축토드)

  • 이재진
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.9
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    • pp.2074-2079
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    • 1997
  • Much recent work has been done in the two related areas of source coding for data compression, and channel coding for data storage, respectively. We propose two (0, k) run-lengh limited(RLL) data compression codes for the storage that combine source and channel coding. It was shown that the propsoed codes approach the maximum code rate of (0, k) code as k increase. Thus, the overall code rate of storage system can be increased by using the combined source/channel coding as compared to the conventional 8/9 code which is popular in hard drive systems Functhermore, one can also reduce the complexity of modulation coding procedure by using already RLL constrained data.

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Solution of OECD/NEA PWR MOX/UO2 benchmark with a high-performance pin-by-pin core calculation code

  • Hyunsik Hong;Jooil Yoon
    • Nuclear Engineering and Technology
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    • v.56 no.9
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    • pp.3654-3667
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    • 2024
  • Expanding upon the framework of the steady-state pin-by-pin 2D/1D decoupling method, a novel and highperformance pin-by-pin transient calculation method has been introduced. This transient method, consistent to the steady-state formulation, is designed for time-dependent calculations utilizing a 3D diffusion-based finite difference method (FDM). The inherent complexity of the large 3D problem is effectively managed by decoupling it into a series of planar (2D) and axial (1D) problems. In addition, tens of thousands of pin-cells are grouped into hundreds of boxes to reduce the computing burden for the 1D calculations without essential loss of the accuracy. Two-level coarse mesh finite difference (CMFD) formulation comprising multigroup nodewise CMFD and twogroup assemblywise CMFD is employed as well to accelerate the convergence. Errors originating from the pinlevel homogenization, energy group condensation, and the use of lower order calculation methods are simultaneously corrected by the pinwise super homogenization (SPH) equivalence factor. The transient method is evaluated with OECD/NEA PWR MOX/UO2 benchmark. Code-to-code comparison with the nTRACER direct whole core calculation code yielded highly satisfactory results for the transient scenario as well as the steady-state problems. Furthermore, comparative analyses with conventional nodal calculations show superiority of the pin-by-pin calculation.

Performance Analysis of Dualrate Multi-code/ Multi-carrier CDMA System with Interference Canceller (간섭제거기를 갖는 이중전송률 MC/MC-CDMA 시스템의 성능분석)

  • Kim, Nam-Sun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.4
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    • pp.830-837
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    • 2009
  • In this thesis, Multi-code/Multi-carrier CDMA(MC/MC CDMA) system which is combination of Multi-code CDMA and Multi-carrier CDMA is analyzed. This system is suitable fur multi-rate services that use multi-codes and high data rate transmission that employ multi-carriers. In addition, the MC/MC CDMA system is robust against frequency selective fading, is good for narrowband interference rejection, and has higher spectral efficiency. In this paper, The users are assigned OVSF codes as a spreading code according to their data rates and divides the active users having different representative code split into a number of groups for effective cancellation. At the receiver, The code grouping interference canceller performs cancellation between the groups. The proposed receiver does not require any information about interference users, such as code, data and amplitude, and has relatively low complexity. The results show the large improvement in performance that can be attained by cancellation scheme.

Multiple-Symbol Differential Detection Scheme of Differentially Encoded MultiPhase Clipped MultiCode CDMA System (차동 부호화된 MultiPhase Clipped MultiCode CDMA 시스템의 수신 성능 개선을 위한 다중 심볼 차동 검출 방식 연구)

  • 이병하;안철용;김동구;조진웅
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.10A
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    • pp.807-815
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    • 2003
  • MultiCode-CDMA (MC-CDMA) system of chip level MPSK incorporating with clipper (MP-CDMA)[l] shows constant envelope signal which can mitigate the performance degradation due to nonlinear transmit amplifier. In this paper, modulation is modified to carry out differential encoded MPSK rather than MPSK. The modified system is called DMP-CDMA. DMP-CDMA using differential detection has advantages on receiver complexity and pilot overhead. However, it is inferior to coherent detection by about 4.0dB due to inherent power inefficiency of noncoherent detection and the error propagation. Multiple symbol differential detection is employed in order to improve DMP-CDMA using differential detection. As the result, the performance of DMP-CDMA system is improved about 3.6dB compared to differential detection.

Effective Decoding Algorithm of Three dimensional Product Code Decoding Scheme with Single Parity Check Code (Single Parity Check 부호를 적용한 3차원 Turbo Product 부호의 효율적인 복호 알고리즘)

  • Ha, Sang-chul;Ahn, Byung-kyu;Oh, Ji-myung;Kim, Do-kyoung;Heo, Jun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.9
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    • pp.1095-1102
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    • 2016
  • In this paper, we propose a decoding scheme that can apply to a three dimensional turbo product code(TPC) with a single parity check code(SPC). In general, SPC is used an axis with shortest code length in order to maximize a code rate of the TPC. However, SPC does not have any error correcting capability, therefore, the error correcting capability of the three-dimensional TPC results in little improvement in comparison with the two-dimensional TPC. We propose two schemes to improve performance of three dimensional TPC decoder. One is $min^*$-sum algorithm that has advantages for low complexity implementation compared to Chase-Pyndiah algorithm. The other is a modified serial iterative decoding scheme for high performance. In addition, the simulation results for the proposed scheme are shown and compared with the conventional scheme. Finally, we introduce some practical considerations for hardware implementation.

Receivers for Spatially Multiplexed Space-Time Block Coded Systems : Reduced Complexity (시공간블록부호화를 적용한 공간다중화 시스템 수신기 : 복잡도 감소 방안)

  • Hwang Hyeon Chyeol;Shin Seung Hoon;Lee Cheol Jin;Kwak Kyung Sup
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.11A
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    • pp.1244-1252
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    • 2004
  • In this paper, we derive some properties of linear detectors (zero forcing or minimum mean square error) at spatial multiplexing systems with alamouti's space-time block code. Based on the derived properies, this paper proposes low-complexity receivers. Implementing MMSE detector adaptively, the number of weight vectors to be calculated and updated is greatly reduced with the derived properties compared to the conventional methods. In the case of recursive least square algorithm, with the proposed approach computational complexity is reduced to less than the half. We also identify that sorted QR decomposition detector, which reduces the complexity of V-Blast detector, has the same properties for unitary matrix Q and upper triangular matrix R. A complexity reduction of about 50%, for sorted QR decomposition detector, can be achieved by using those properties without the loss of performance.

Low Computational Complexity LDPC Decoding Algorithms for DVB-S2 Systems (DVB-S2 시스템을 위한 저복잡도 LDPC 복호 알고리즘)

  • Jung Ji-Won
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.10 s.101
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    • pp.965-972
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    • 2005
  • In this paper, we first review LDPC codes in general and a belief propagation algorithm that works in logarithm domain. LDPC codes, which is chosen for second generation digital video broadcasting standard, are required a large number of computation due to large size of coded block and iteration. Therefore, we presented two kinds of low computational algorithm for LDPC codes. First, sequential decoding with partial group is proposed. It has same H/W complexity, and fewer number of iteration's are required at same performance in comparison with conventional decoder algerian. Secondly, early detection method for reducing the computational complexity is proposed. Using a confidence criterion, some bit nodes and check node edges are detected early on during decoding. Through the simulation, we knew that the iteration number are reduced by half using subset algorithm and computational complexity of early detected method is about $50\%$ offs in case of check node update, $99\%$ offs in case of check node update compared to conventional scheme.

New Time-Domain Decoder for Correcting both Errors and Erasures of Reed-Solomon Codes

  • Lu, Erl-Huei;Chen, Tso-Cho;Shih, Chih-Wen
    • ETRI Journal
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    • v.38 no.4
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    • pp.612-621
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    • 2016
  • A new time-domain decoder for Reed-Solomon (RS) codes is proposed. Because this decoder can correct both errors and erasures without computing the erasure locator, errata locator, or errata evaluator polynomials, the computational complexity can be substantially reduced. Herein, to demonstrate this benefit, complexity comparisons between the proposed decoder and the Truong-Jeng-Hung and Lin-Costello decoders are presented. These comparisons show that the proposed decoder consistently has lower computational requirements when correcting all combinations of ${\nu}$ errors and ${\mu}$ erasures than both of the related decoders under the condition of $2{\nu}+{\mu}{\leq}d_{\min}-1$, where $d_{min}$ denotes the minimum distance of the RS code. Finally, the (255, 223) and (63, 39) RS codes are used as examples for complexity comparisons under the upper bounded condition of min $2{\nu}+{\mu}=d_{\min}-1$. To decode the two RS codes, the new decoder can save about 40% additions and multiplications when min ${\mu}=d_{min}-1$ as compared with the two related decoders. Furthermore, it can also save 50% of the required inverses for min $0{\leq}{\mu}{\leq}d_{\min}-1$.

Low-Complexity Multi-Size Circular Shifter for QC-LDPC Decoder Based on Two Serial Barrel-Rotators (두 개의 직렬 Barrel-Rotator를 이용한 QC-LDPC 복호기용 저면적 Multi-Size Circular Shifter)

  • Kang, Hyeong-Ju
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.8
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    • pp.1839-1844
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    • 2015
  • The low-density parity-check(LDPC) code has been adopted in many communication standards due to its error correcting performance, and the quasi-cyclic LDPC(QC-LDPC) is widely used because of implementation easiness. In the QC-LDPC decoder, a cyclic-shifter is required to rotate data in various sizes. This kind of cyclic-shifters are called multi-size circular shifter(MSCS), and this paper proposes a low-complexity structure for MSCS. In the conventional serially-placed two barrel-rotators, the unnecessary multiplexers are revealed and removed, leading to low-complexity. The experimental results show that the area is reduced by about 12%.