• Title/Summary/Keyword: circuit modeling

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Operational Mode Analysis of Cooler Driver Electronics in Satellite and System Safety Margin

  • Kim, Kyudong
    • Journal of Aerospace System Engineering
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    • v.14 no.6
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    • pp.79-84
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    • 2020
  • Cooler driver electronics (CDE) for maintaining low temperature of the satellite payload IR sensor consists of a compressor that has a pulsation current load condition when it is operated. This pulsation current produces large voltage fluctuation, which affects both load and regulated bus stability. Thus, CDE power conditioning system consists of a primary bus, infrared power distribution unit for battery charging and protection, reverse current protection diode, and battery, which is used as a buffer. In this study, the operational mode analysis is performed by each part with equivalent impedance modeling verified through system level simulation. From this mode analysis, the safety margin for state of charge and open circuit voltage of the battery is determined for satisfying the minimum operational voltage of the CDE load.

Compact Modeling for Nanosheet FET Based on TCAD-Machine Learning (TCAD-머신러닝 기반 나노시트 FETs 컴팩트 모델링)

  • Junhyeok Song;Wonbok Lee;Jonghwan Lee
    • Journal of the Semiconductor & Display Technology
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    • v.22 no.4
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    • pp.136-141
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    • 2023
  • The continuous shrinking of transistors in integrated circuits leads to difficulties in improving performance, resulting in the emerging transistors such as nanosheet field-effect transistors. In this paper, we propose a TCAD-machine learning framework of nanosheet FETs to model the current-voltage characteristics. Sentaurus TCAD simulations of nanosheet FETs are performed to obtain a large amount of device data. A machine learning model of I-V characteristics is trained using the multi-layer perceptron from these TCAD data. The weights and biases obtained from multi-layer perceptron are implemented in a PSPICE netlist to verify the accuracy of I-V and the DC transfer characteristics of a CMOS inverter. It is found that the proposed machine learning model is applicable to the prediction of nanosheet field-effect transistors device and circuit performance.

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Physical-based Dye-sensitized Solar Cell Equivalent Circuit Modeling and Performance Analysis (물리 기반의 염료 감응형 태양전지 등가회로 모델링 및 성능 분석)

  • Wonbok Lee;Junhyeok Song;Hwijun Choi;Bonyong Gu;Jonghwan Lee
    • Journal of the Semiconductor & Display Technology
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    • v.22 no.3
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    • pp.67-72
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    • 2023
  • In this paper, a dye-sensitized solar cell (DSSC), one of the representative third-generation solar cells with eco-friendly materials and processes compared to other solar cells, was modeled using MATLAB/Simulink. The simulation was conducted by designating values of series resistance, parallel resistance, light absorption coefficient, and thin film electrode thickness, which are directly related to the efficiency of dye-sensitized solar cells, as arbitrary experimental values. In order to analyze the performance of dye-sensitized solar cells, the optimal value among each parameter experimental value related to efficiency was found using formulas for fill factor (FF) and conversion efficiency.

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Comparative Study between Two-loop and Single-loop Control of DC/DC Converter for PVPCS (PVPCS DC/DC 컨버터 모델링 및 2중 루프 제어와 단일 루프 제어의 특성 비교)

  • Kim, Dong-Hwan;Jung, Seung-Hwan;Song, Seung-Ho;Choi, Ju-Yeop;Choi, Ick;An, Jin-Ung;Lee, Sang-Chul;Lee, Dong-Ha
    • Journal of the Korean Solar Energy Society
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    • v.32 no.spc3
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    • pp.245-254
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    • 2012
  • In photovoltaic system, the characteristics of photovoltaic module such as open circuit voltage and short circuit current will be changed because of cell temperature and solar radiation. Therefore, the boost converter of a PV system connects between the output of photovoltaic system and DC link capacitor of grid connected inverter as controlling duty ratio for maximum power point tracking(MPPT). This paper shows the dynamic characteristics of the boost converter by comparing single-loop and two-loop control algorithm using both analog and digital control. Both proposed compensation methods have been verified with computer simulation to demonstrate the validity of the proposed control schemes.

Impedance Calculation of Power Distribution Networks for High-Speed DRAM Module Design (고속DRAM모듈 설계에 대한 전원평면의 임피던스계산)

  • Lee, Dong-Ju;Younggap You
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.3
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    • pp.49-60
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    • 2002
  • A systematic design approach for Power distribution network (PDN) is presented aiming at applications to DRAM module designs. Three main stages are comprised in this design approach: modeling and simulation of a PDN based on a two-dimensional transmission line structure employing a partial element equivalent circuit (PEEC); verification of the simulation results through comparison to measured values; and design space scanning with PDN parameters. Impedance characteristics for do-coupling capacitors are analyzed to devise an effective way to stabilize power and ground plane Performance within a target level of disturbances. Self-impedance and transfer-impedance are studied in terms of distance between circuit features and the size of do-coupling capacitors. A simple equation has been derived to find the do-coupling capacitance values yielding impedance lower than design target, and thereby reducing the overall computation time. The effectiveness of the design methodology has been demonstrated using a DRAM module with discrete do-coupling capacitors and a strip structure.

Layout-Based Inductance Model for On-Chip Power Distribution Grid Structures (레이아웃 기반 온-칩 전력 분배 격자 구조의 인덕턴스 모델 개발 및 적용)

  • Jo, JeongMin;Kim, SoYoung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.9
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    • pp.259-269
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    • 2012
  • With the lower supply voltage and the higher operating frequency in integrated circuits, the analysis of the power distribution network (PDN) including on-chip inductances becomes more important. In this paper, an effective inductance extraction method for a regular on-chip power grid structure is proposed. The loop inductance model applicable to chip layout is proposed and the inductance extraction tool using the proposed inductance model based on post layout RC circuits is developed. The accuracy of the proposed loop model and the developed tool is verified by comparing the test circuit simulation results with those from the partial element equivalent circuit (PEEC) model. The voltage fluctuation from the RLC circuits extracted by the developed tool was examined for the analysis of on-chip inductance effects. The significance of on-chip power grid inductance was investigated by the co-simulation of chip-package-PCB.

Loadbalancing for WDM Network using Dynamic Watermarks (WDM 네트워크에서 동적 워터마크 결정을 이용한 로드벨런싱)

  • Nahm, Jung-Joo;Kim, Sung-Chun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.2
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    • pp.1-5
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    • 2007
  • Wavelength-division multiplexed (WDM) networks are emerging to be the right choice for the future transport networks. In WDM networks, the optical layer provides circuit-switched lightpath services to the client layer such as IP, SONET and ATM. The set of lightpaths in the optical layer defines the virtual topology. Since the optical switches are reconfigurable, the virtual topology can be reconfigured in accordance with the changing traffic demand pattern at theclient layer in order to optimize the network performance. We present a new approach to the virtual topology reconfiguration and loadbalancing problem for wavelength-routed, optical wide-area networks under dynamic traffic demand. By utilizing the measured Internet backbone traffic characteristics, our approach follows the changes in traffic without assuming that the future traffic pattern is known. For the simulation traffic modeling, we collected the data from real backbone traffic. Experiments show that the standard deviation compared to previous technique is reduced.

High Efficiency Silicon Solar Cell(II)-Computer Modeling on Diffused Silicon Solar Cell (고효율 실리콘 태양전지(II)-확산형 실리콘 태양전지에 대한 모의 실험)

  • 강진영;이종덕
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.18 no.4
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    • pp.49-61
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    • 1981
  • A generally applicable computer simulation program for diffused silicon solar cells has been developed on the basis of the experimental results. The program can be easily used to obtain the spectral response and I-V characteristics for N+P, P+N N+PP+, P+NN+cells by changing various input parameters. The insolated spectra can be taken from AMI and constant intensity and GE - ELH lamp light sources. The options for AR coating are Si3N4 film and materials with constant reflectance including zero reflectance for ideal case. The computer simulation demonstrates successful results compared with the measured values for the short circuit current, open circuit voltage, efficiency, spectral response, quantum efficiency, I-V characteristics, etc. This program was used to optimize doping concentration, cell thickness, light concentration, junction depth, and to obtain the limit values for front surface recornbination velocity, effective carrier life time in the depletion regions and shunt resistance, and also to drive the changing rate in conversion efficiency depending on operation temperature, series resistance and electric field strength in N+P+ bulk regions.

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Modeling and Characteristics of PDA CCFL Driving Circuits for Piezoelectric Transformer (압전 트랜스포머를 이용한 PDA용 CCFL구동회로의 모델링과 동작특성)

  • Hwang L.H.;Jang E.S.;Nam W.Y.;Yoo J.H.;Oh D.O.;Cho M.T.;Ahn I.S;Joo H. J
    • Proceedings of the KIPE Conference
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    • 2003.07a
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    • pp.279-282
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    • 2003
  • In this paper, to apply piezoelectric transformer for PDA backlight inverter, piezoelectric transformer using the composition which $Nb_2O_5$ added into PNW-PMN-PZT ceramics was fabricated as Rosen-type one with the size of $1165mm^3$. And their electrical characteristics were investigated with the variations of load resistance and driving frequency And then, the driving circuit for PDA CCFL(0.6W) which composed of the two MOSFETs connecting in series was manufactured using piezoelectric transformer, VCO and one-chip microprocessor. After driving for 25 min using the proposed circuit for PDA CCFL(0.6W), driving frequency of 214.4kHz, input voltage of 31.78 V and input current of 21.1mA were shown. And then, output voltage of 293.2 V and output current of 2.2mA were shown. At the same time, efficiency of 96.2$\%$ and temperature rise of $3.6^{\circ}C$ were appeared at the piezoelectric transformer.

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Circuit Model Based Analysis of a Wireless Energy Transfer System via Coupled Magnetic Resonances (결합된 자기공명을 통한 무선에너지 전력 전송 시스템의 회로 해석)

  • Cheon, Sang-Hoon;Kim, Yong-Hae;Lee, Myung-Lae;Kang, Seung-Youl
    • The Transactions of the Korean Institute of Power Electronics
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    • v.16 no.2
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    • pp.137-144
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    • 2011
  • A Simple equivalent circuit model is developed for a wireless energy transfer system via coupled magnetic resonances and a practical design method is also provided. Node equations for the resonance system are built with the method, expanding on the equations for a transformer, and the optimum distances of coils in the system are derived analytically for optimum coupling coefficients for high transfer efficiency. In order to calculate the frequency characteristics for a lossy system, the equivalent model is established at an electric design automation tool. The model parameters of the actual system are extracted and the modeling results are compared with measurements. Through the developed model, it is seen that the system can transfer power over a mid-range of a few meters and impedance matching is important to achieve high efficiency. This developed model can be used for a design and prediction on the similar systems such as increasing the number of receiving coils and receiving modules, etc.