• Title/Summary/Keyword: chip processing

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Implementation of Image Enhancement Using DSP Chip (TI DAVINCI를 이용한 영상 개선 알고리즘 구현)

  • Park, Jong-Hwa;Ahn, Tae-Ki;Jo, Byung-Mok;Park, Goo-Man
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.11 no.6
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    • pp.311-317
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    • 2011
  • In this paper, we proposed realtime image enhancing method on the three noise types of input images, such as haze, low contrast and back light images. Some conventional de-hazing algorithms have good performance but need large memories and high computational burdens. We proposed the efficient algorithm which not only removes the haze but also reduces memory usage and computational complexity. We implemented the realtime system by using DM6446 DSP chip, and it showed the excellent result in these three problems; haze, low contrast and back light. We implemented the system with the processing speed at 15 frames/sec.

Improvement of learning performance and control of a robot manipulator using neural network with adaptive learning rate (적응 학습률을 이용한 신경회로망의 학습성능개선 및 로봇 제어)

  • Lee, Bo-Hee;Lee, Taek-Seung;Kim, Jin-Geol
    • Journal of Institute of Control, Robotics and Systems
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    • v.3 no.4
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    • pp.363-372
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    • 1997
  • In this paper, the design and the implementation of the adaptive learning rate neural network controller for an articulate robot, which is being developed (or) has been developed in our Automatic Control Laboratory, are mainly discussed. The controller reduces software computational load via distributed processing method using multiple CPU's, and simplifies hardware structures by the time-division control with TMS32OC31 DSP chip. Proposed neural network controller with adaptive learning rate structure using expert's heuristics can improve learning speed. The proposed controller verifies its superiority by comparing response characteristics of conventional controller with those of the proposed controller that are obtained from the experiments for the 5 axis vertical articulated robot. We, also, present the generalization property of proposed controller for unlearned trajectory and the change of load through experimental data.

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Surroundings and Benefit Analysis on Overseas Planting Investment - Case Study on Thailand - (해외 조림투자 환경과 수익성 분석에 관한 연구 - 태국을 중심으로 -)

  • Woo, Jong-Choon;Seo, Yeong-Wan
    • Journal of Forest and Environmental Science
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    • v.18 no.1
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    • pp.61-72
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    • 2001
  • The study was carried out to investigate the surroundings and benefit analysis on the planting investment of Thailand for securing a stable supply of timber through overseas planting, The results show that Thailand government is planing to increase the coverage of forest from 25% to 40%, encouraging planting over the country. More advantages and incentives are given in the investments in planting and wood-processing industries such as plywood, veneer, and chip & hard board, etc. In Thailand Eucalyptus species which are most popular in planting as they are lucratively used as a material of pulp. The Internal rate of return (IRR) in the study was ranged from 29.1 % to 59.3.

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The Design of Chorus DSP Chip Using Psychoacoustic Model and SOLA Algorithm (심리음향모델과 SOLA 알고리즘을 이용한 코러스 칩 설계)

  • 김태훈;박주성
    • The Journal of the Acoustical Society of Korea
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    • v.19 no.3
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    • pp.11-19
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    • 2000
  • This research deals with the implementation procedures of a chorus processing DSP for karaoke system. It is necessary to compress the chorus data to store as many choruses as we can. We apply MPEG-1 audio algorithm to compress the chorus data. And the chorus system must be accompanied with the karaoke that can change the key and the tempo. So the chorus DSP must be able to change the key and tempo of the chorus data. We apply SOLA (Synchronized Overlap and Add) to do it. We designed the chorus DSP that can compress the chorus, change the key and tempo. And we verified the chorus DSP logic using FPGA. The used FPGA are two FLEX10K100s made by ALTERA. Finally we make the ASIC chip of chorus DSP and verify its operation.

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Recovery Technique using PLT in a Page-Server Object Oriented DBMS (페이지-서버 객체지향 DBMS에서의 PLT를 이용한 회복기법)

  • Cho, Sung-Je
    • The KIPS Transactions:PartD
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    • v.9D no.6
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    • pp.1097-1104
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    • 2002
  • Recently, with a drop in memory chip price and rapid development of mass storage memory chip technology, research on client-server Database Management Systems has gained wide attention. This Paper discusses the recovery technique in a page-server OODBMS environment. Although most researchers have studied client-server systems, the recovery technique has been a poor researches. In this paper, client transfers only the completed log records to the server and resolves the problems in the current recovery techniques. In addition, the server manages only the execution of completed log records suggesting a simple recover algorithm, Client uses system concurrency, fully, by acting to abort actions and it suggests a page unit recovery technique to reduce time that is required in the whole database.

The Variation of Permeability and$Q_{max}$ Frequency with Processing Parameters in NiCuZn Ferrites (제조 공정 Parameter에 따른 NiCuZn Ferrite의 투자율과 $Q_{max}$ 주파수 변화)

  • 신재영;박지호;박진채;한종수;송병무
    • Journal of the Korean Magnetics Society
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    • v.7 no.1
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    • pp.19-24
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    • 1997
  • Composition and process conditions for low temperature sintered NiCuZn ferrites were investigated, so as to fabricate multilayered chip inductor. The$Fe_2O_3$ deficiency for low temperature sintering was decreased with NiO contents of NiCuZn ferrites. The permeability of NiCuZn ferrites can be controlled in the range of 12~562 with the variation of NiO and $Co_3O_4$ contents. The $Q_{max} $ frequency of NiCuZn ferrites was decreased from 50 MHz to 3 MHz linearly with permeability increase from 60 to 560. The relation between the $Q_{max}$ frequency(Y) and permeability(X) of NiCuZn ferrites was expressed with the following empirical equation, logY=4.2-1.4logX.

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Flip Chip Bonder for Automactic Parallel Aligning of IR Sensors and Read Out Integrated Circuits (적외선 센서/ROIC 접합을 위한 자동 평행 배열 방식의 플립 칩 본더)

  • Suh, Sang-Hee;Kim, Jin-Sang;An, Se-Young
    • Journal of Sensor Science and Technology
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    • v.10 no.5
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    • pp.337-342
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    • 2001
  • Infrared sensors with one or two dimensional arrays are usually bonded via indium bumps to Si CMOS read out circuits. Therefore, both sensing of infrared beams and processing of signals are performed at the focal plane. This gives us a benefit of reducing noise as well as size of infrared detectors. We have developed a way of boding indium bumps with keeping sensor and ROIC parallel to each other. The flip chip bonder developed has a very simple structure and is easy to operate. So we expect that reliability will be improved very much.

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Long Pulse Generation Technology of an Alexandrite Laser System for Hair Removal

  • Kim, Hee-Je;Park, Jin-Young;Kwak, Su-Young;Kim, Su-Weon;Min, Byoung-Dae;Jung, Jong-Han;Hong, Jung-Hwan
    • KIEE International Transactions on Electrophysics and Applications
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    • v.3C no.4
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    • pp.155-160
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    • 2003
  • In this study, an Alexandrite laser system for hair removal adopting a multi-discharge method in which three flash lamps are turned on consecutively was designed and fabricated to examine the pulse width and the pulse shape of the laser beams depending upon the changes in the lamp turn-on time. Specifically, this study demonstrates a technology that makes it possible to formulate various pulse shapes by turning on three flashlamps consecutively on a real-time basis with the aid of a PIC (program integrated circuit) one-chip microprocessor. With this technique, the lamp turn-on delay time can be varied more diversely from 0 to 10 ms and real-time control is possible with an external keyboard, enabling an assortment of pulse shapes. In addition, longer pulses can be more widely used for industrial processing as well as for numerous medical purposes.

Design and Implementation of the 155Mbps Adaptive CODEC for Ka-band Satellite Communications

  • Park, Eun-A;Chang, Dae-Ig;Kim, Nae-Soo
    • Proceedings of the IEEK Conference
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    • 2002.07c
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    • pp.1940-1943
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    • 2002
  • In this paper, we presented the design and implementation of 155Mbps satellite Modem adaptively compensated against the rain attenuation. In order to compensate the rain attenuation over high-speed satellite ink, the adaptive coding schemes with variable coding rates and the pragmatic TCM that can be decoded both the QPSK and TC-8PSK using same Viterbi decoder was studied and analyzed. The pragmatic TCM with rate 213, selected to the optimal parameters for implementation, was modeled by VHDL in this paper. The key design issues are how to achieve a high data rate and how to integrated into a single ASIC chip various functions such as the different data rates, Scrambler/descrambler, Interleaver, Encoder/decoder, and BPSK/QPSK/8PSK modulator/demodulator. The implemented 155M0ps adaptive MODEM has the simplified interface circuits among the many functional blocks, and parallel processing architecture to achieve the high data rate. This 155Mbps adaptive MODEM was designed and implemented by single ASIC chip with the 0.25 $\mu\textrm{m}$ CMOS standard cell technology.

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A 3 ~ 5 GHz CMOS UWB Radar Chip for Surveillance and Biometric Applications

  • Lee, Seung-Jun;Ha, Jong-Ok;Jung, Seung-Hwan;Yoo, Hyun-Jin;Chun, Young-Hoon;Kim, Wan-Sik;Lee, Noh-Bok;Eo, Yun-Seong
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.4
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    • pp.238-246
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    • 2011
  • A 3-5 GHz UWB radar chip in 0.13 ${\mu}m$ CMOS process is presented in this paper. The UWB radar transceiver for surveillance and biometric applications adopts the equivalent time sampling architecture and 4-channel time interleaved samplers to relax the impractical sampling frequency and enhance the overall scanning time. The RF front end (RFFE) includes the wideband LNA and 4-way RF power splitter, and the analog signal processing part consists of the high speed track & hold (T&H) / sample & hold (S&H) and integrator. The interleaved timing clocks are generated using a delay locked loop. The UWB transmitter employs the digitally synthesized topology. The measured NF of RFFE is 9.5 dB in 3-5 GHz. And DLL timing resolution is 50 ps. The measured spectrum of UWB transmitter shows the center frequency within 3-5 GHz satisfying the FCC spectrum mask. The power consumption of receiver and transmitter are 106.5 mW and 57 mW at 1.5 V supply, respectively.