• IEIE Transactions on Smart Processing and Computing
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• v.5 no.5
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• pp.303-309
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• 2016

This paper presents a channel-adaptive rate control algorithm for low delay video coding. The main goal of the proposed method is to adaptively use the unknown available channel bandwidth while reducing the end-to-end delay between encoder and decoder. The key idea of the proposed algorithm is for the status of the encoder buffer to indirectly reflect the mismatch between the available channel bandwidth and the generated bitrate. Hence, the proposed method fully utilizes the unknown available channel bandwidth by monitoring the encoder buffer status. Simulation results show that although the target bitrate mismatches the available channel bandwidth, the encoder efficiently adapts the given available bandwidth to improve the peak signal-to-noise ratio.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.3
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• pp.23-31
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• 2010

The increasing demands on low-power, and low-complexity video encoder have been motivating extensive research activities on distributed video coding (DVC) in which the encoder compresses frames without utilizing inter-frame statistical correlation. In DVC encoder, contrary to the conventional video encoder, an error control code compresses the video frames by representing the frames in the form of syndrome bits. In the meantime, the DVC decoder generates side information which is modeled as a noisy version of the original video frames, and a decoder of the error-control code corrects the errors in the side information with the syndrome bits. The noisy observation, i.e., the side information can be understood as the output of a virtual channel corresponding to the orignal video frames, and the conditional probability of the virtual channel model is assumed to follow a Laplacian distribution. Thus, performance improvement of DVC systems depends on performances of the error-control code and the optimal reconstruction step in the DVC decoder. In turn, the performances of two constituent blocks are directly related to a better estimation of the parameter of the correlation channel. In this paper, we propose an algorithm to estimate the parameter of the correlation channel and also a low-complexity version of the proposed algorithm. In particular, the proposed algorithm minimizes squared-error of the Laplacian probability distribution and the empirical observations. Finally, we show that the conventional algorithm can be improved by adopting a confidential window. The proposed algorithm results in PSNR gain up to 1.8 dB and 1.1 dB on Mother and Foreman video sequences, respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.5A
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• pp.359-369
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• 2005

For large capacity optical CDMA networks, we propose a shared-type encoder/decoders based on an tunable wavelength converter(TWC) and an arrayed waveguide grating (AWG) router. The proposed encoder/decoder treats codewords of wavelength/time 2-D code simultaneously using the dynamic code allocation property of the TWC and the cyclic property of the AWG router, and multiple subscribers can share the encoder/decoder in networks. Feasibility of the structure of the proposed encoder/decoder for dynamic code allocation is tested through simulations using two wavelength/time 2-D codes, which are the generalized multi-wavelength prime code(GMWPC) and the generalized multi-wavelength Reed-Solomon code(GMWRSC). Test results show that the proposed encoder/decoder can increase the channel efficiency not only by increasing the number of simultaneous users without any multiple-access interference but by using a relatively short length CDMA codes.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.14 no.4
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• pp.1689-1703
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• 2020

When data is transmitted over an unreliable channel, the error of the data packet may result in serious degradation. The multiple description coding (MDC) can solve this problem and save transmission costs. In this paper, we propose a deep multiple description coding network (MDCN) to realize efficient image compression. Firstly, our network framework is based on convolutional auto-encoder (CAE), which include multiple description encoder network (MDEN) and multiple description decoder network (MDDN). Secondly, in order to obtain high-quality reconstructed images at low bit rates, the encoding network and decoding network are integrated into an end-to-end compression framework. Thirdly, the multiple description decoder network includes side decoder network and central decoder network. When the decoder receives only one of the two multiple description code streams, side decoder network is used to obtain side reconstructed image of acceptable quality. When two descriptions are received, the high quality reconstructed image is obtained. In addition, instead of quantization with additive uniform noise, and SSIM loss and distance loss combine to train multiple description encoder networks to ensure that they can share structural information. Experimental results show that the proposed framework performs better than traditional multiple description coding methods.

• Journal of Broadcast Engineering
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• v.16 no.6
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• pp.1026-1035
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• 2011

This paper presents generalization and application for the conventional SISO decoding algorithm of Block Turbo Codes. R. M. Pyndiah suggested an iterative SISO decoding algorithm for Product Codes, two-dimensionally combined linear block codes, on AWGN channel. It wascalled Block Turbo Codes. Based on decision of Chase algorithm which is SIHO decoding method, SISO decoder for BTC computes soft decision information and transfers the information to next decoder for iterative decoding. Block Turbo Codes show Shannon limit approaching performance with a little iteration at high code rate on AWGN channel. In this paper we generalize the conventional decoding algorithm of Block Turbo Codes, under BPSK modulation and AWGN channel transmission assumption, to the LLR value based algorithm and suggest an application example such as concatenated structure of LDPC codes and Block Turbo Codes.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.6
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• pp.1195-1201
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• 2005

This paper deals with procedures and results for teal time implementation of G.729 speech coder and channel coder including convolution codec, viterbi decoder, and interleaver using a fixed point DSP chip for radio communication systems. We described the method for real-time implementation based on integer simulation results and explained the implemented results by quality performance and required complexity for real-time operation. The required complexity was 24MIPS and 9MIPS in computational load, and 12K words and 4K words in execution code length for speech and channel. The functional evaluation was performed into two steps. The one was bit exact comparison with a fixed point C code, the other was executed by actual speech samples and error test vectors. Unlik other results such as individual implementation, We implemented speech and channel coders on a DSP chip with 160MIPS computation capability and 64 K words memory on chip. This results outweigh the conventional methods in the point of system complexity and implementation cost for radio communication system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.7C
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• pp.611-617
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• 2010

In this paper, we investigate the performances of the serial concatenated convolutional codes (SCCC) and low-density parity-check (LDPC) codes on perpendicular magnetic recording (PMR) channels. We discuss the performance of two systems when user bit-densities are 1.7, 2.0, 2.4 and 2.8, respectively. The SCCC system is less complex than LDPC system. The SCCC system consists of recursive systematic convolutional (RSC) codes encoder/decoder, precoder and random interleaver. The decoding algorithm of the SCCC system is the soft message-passing algorithm and the decoding algorithm of the LDPC system is the log domain sum-product algorithm (SPA). When we apply the iterative decoding between channel detector and the error control codes (ECC) decoder, the SCCC system is compatible with the LDPC system even at the high user bit density.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.1099-1102
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• 1999

This paper presents a real-time MPEG-2 AAC decoding system, which can decode 2-channel main profile MPEG-2 AAC bitstream. The proposed system supports all decoding tools except for coupling channel tool, and provides sampling rates of 32, 44.1, 48 KHz. The system consists of a simple programmable DSP core and two hardwired logic modules that perform Huffman decoding and prediction for real-time implementation.

• Proceedings of the IEEK Conference
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• 2002.06e
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• pp.39-42
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• 2002

A new adaptive PRML architecture, considered not only DVD-ROM but also DVD-Multi including DVD-RAM as well, is presented to demonstrate its superiority over the conventional analog channel in a DVD system. For this new architecture, channel adaptation algorithm using gain controlled type of FIR filter, and asymmetry compensation algorithm using expected level adaptation of viterbi decoder are presented. In addition, a method of modelling the disk tilt and asymmetrical read-back signal are discussed.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.12
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• pp.5361-5374
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• 2016

Combining channel coding and network coding in a physical layer in a fading channel, generalized joint channel-network coding (G-JCNC) is proved to highly perform in a two-way relay channel (TWRC). However, most relevant discussions are restricted to symmetric networks. This paper investigates the G-JCNC protocols in an asymmetric TWRC (A-TWRC). A newly designed encoder used by source nodes that is dedicated to correlate codewords with different orders is presented. Moreover, the capability of a simple common non-binary decoder at a relay node is verified. The effects of a power match under various numbers of iteration and code lengths are also analyzed. The simulation results give the optimum power match ratio and demonstrate that the designed scheme based on G-JCNC in an A-TWRC has excellent bit error rate performance under an appropriate power match ratio.