• 제목/요약/키워드: cell design

검색결과 3,230건 처리시간 0.027초

High cell density cultivation of Bacillus sp.

  • 이백석;채원복;조재희;최기현;김영범;최성원;김은기
    • 한국생물공학회:학술대회논문집
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    • 한국생물공학회 2001년도 추계학술발표대회
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    • pp.290-293
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    • 2001
  • 본 연구는 Bacillus sp.의 고농도 생산을 위한 최적배지 조건의 확립과 배양중 발생하는 foam control에 대해 알아보았다. PBD와 “one factor at a time", BBD로 이여지는 배지 최적화 과정을 통해 최초 생산 배지에서의 균체량보다 100% 이상의 향상된 균사체량을 볼 수 있었다. 또한 scale-up 과정에서 발생하는 foam control를 위해 각기 다른 type의 antifoam을 사용하였는데, 적당한 농도에서 좋은 생장을 보이고 있었고, vegetable oil은 foam control과 값비싼 탄소원인 soluble starch을 대신할 수 있는 좋은 기질임을 알 수 있었다. 또한 배양액 내의 산소를 잡고 있으면서 좋은 전달자의 역학을 하여 급격한 DO의 감소를 막아주었다.

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실험계획법을 이용한 쌍안경식 6축 로드셀의 설계 및 상호간섭 오차 평가 (Design and evaluation of binocular type six-component load cell by using experimental technique)

  • 강대임;김갑순;정수연;주진원
    • 대한기계학회논문집A
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    • 제21권11호
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    • pp.1921-1930
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    • 1997
  • This paper presents the effective technique to design a six-axis load cell by using experimental design with an orthogonal array. A binocular structure is used as a basic sensing element for a load cell instead of the parallel plate structure. The finite element method is adopted to obtain strain distributions of the sensing element, and by doing the analysis of variances, its results are utilized in determining the factor which is more influential to the output strain. Calibration test results show that the developed six-axis loa cell with the maximum capacities of 196 N in forces and 19.6 N. m in moments is evaluated to be useful with the coupling error less than 2.5%.

도심 MICROCELL의 CDMA 시스템 용량에 대한 기지국 배치 효과 (Effect of Cell Shape on Design of CDMA Systems for Urban Microcells)

  • 민승욱;최진규
    • 한국통신학회논문지
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    • 제32권3B호
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    • pp.153-160
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    • 2007
  • 도심에서와 같이 주변 빌딩보다 낮은 높이의 안테나를 가진 낮은 출력의 기지국의 배치는 전파특성의 주변 환경에 대한 의존성을 높인다. 결과적으로 도심에서의 전파는 방향성을 가지며, 이는 기존의 셀룰러 시스템에서 사용된 원형 기지국 반경에 대한 가정이 더 이상 유효하지 않음을 의미한다. 원형 기지국 반경에 대한 가정은 시스템 설계를 보수적으로 하여 더 많은 기지국을 필요로 하게 된다. 이 연구는 비등방형 전파모델에 의한 기지국 배치가 시스템 용량에 끼치는 영향을 조사한다. 직교형 거리를 가진 지형에서 안테나 높이가 낮은 기지국에 대한 측정 데이터에 의한 전파모델이 서술되고 소프트 핸드오프에 대하여 분석이 이루어진다.

5MW급 발전용 가스터빈 엔진 성능시험 설비 (5MW Class Gas Turbine Engine Test Cell)

  • 남삼식;송주영;김성현;이기훈
    • 한국추진공학회:학술대회논문집
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    • 한국추진공학회 2010년도 제35회 추계학술대회논문집
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    • pp.339-342
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    • 2010
  • 두산중공업(주)은 개발 중인 5MW급 발전용 가스터빈의 작동 특성과 설계 인자들을 검증하기 위한 엔진 시험설비를 구축하였으며, 개발 엔진의 모든 성능 인자들을 안전하고 신뢰성 있게 평가하기 위해서 요구 조건을 충족시킬 수 있도록 엔진 테스트 셀을 설계하였다. 구축된 테스트 셀은 엔진의 시동에서 최대 출력조건까지 엔진의 전체 운전 상태를 효과적으로 재현할 수 있기 때문에 다양한 조건에서의 엔진시험 결과를 활용하여 지속적인 설계 개선을 위한 기반시설로 활용 가능하다. 더욱이 개발 엔진의 파생형 모델 개발과 상업모델 출고시험에 활용함으로써 엔진 제작사로서의 개발 경쟁력 제고에 기여할 수 있을 것으로 기대된다.

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단결정 실리콘 TFT Cell의 적용에 따른 SRAM 셀의 전기적 특성 (The Electrical Characteristics of SRAM Cell with Stacked Single Crystal Silicon TFT Cell)

  • 이덕진;강이구
    • 한국컴퓨터산업학회논문지
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    • 제6권5호
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    • pp.757-766
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    • 2005
  • There have been great demands for higher density SRAM in all area of SRAM applications, such as mobile, network, cache, and embedded applications. Therefore, aggressive shrinkage of 6T Full CMOS SRAM had been continued as the technology advances, However, conventional 6T Full CMOS SRAM has a basic limitation in the cell size because it needs 6 transistors on a silicon substrate compared to 1 transistor in a DRAM cell. The typical cell area of 6T Full CMOS SRAM is $70{\sim}90F^{2}$, which is too large compared to $8{\sim}9F^{2}$ of DRAM cell. With 80nm design rule using 193nm ArF lithography, the maximum density is 72M bits at the most. Therefore, pseudo SRAM or 1T SRAM, whose memory cell is the same as DRAM cell, is being adopted for the solution of the high density SRAM applications more than 64M bits. However, the refresh time limits not only the maximum operation temperature but also nearly all critical electrical characteristics of the products such as stand_by current and random access time. In order to overcome both the size penalty of the conventional 6T Full CMOS SRAM cell and the poor characteristics of the TFT load cell, we have developed $S^{3}$ cell. The Load pMOS and the Pass nMOS on ILD have nearly single crystal silicon channel according to the TEM and electron diffraction pattern analysis. In this study, we present $S^{3}$ SRAM cell technology with 100nm design rule in further detail, including the process integration and the basic characteristics of stacked single crystal silicon TFT.

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Stacked Single Crystal Silicon TFT Cell의 적용에 의한 SRAM 셀의 전기적인 특성에 관한 연구 (Electrical Characteristics of SRAM Cell with Stacked Single Crystal Silicon TFT Cell)

  • 강이구;김진호;유장우;김창훈;성만영
    • 한국전기전자재료학회논문지
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    • 제19권4호
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    • pp.314-321
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    • 2006
  • There have been great demands for higher density SRAM in all area of SRAM applications, such as mobile, network, cache, and embedded applications. Therefore, aggressive shrinkage of 6 T Full CMOS SRAM had been continued as the technology advances. However, conventional 6 T Full CMOS SRAM has a basic limitation in the cell size because it needs 6 transistors on a silicon substrate compared to 1 transistor in a DRAM cell. The typical cell area of 6 T Full CMOS SRAM is $70{\sim}90\;F^2$, which is too large compared to $8{\sim}9\;F^2$ of DRAM cell. With 80 nm design rule using 193 nm ArF lithography, the maximum density is 72 Mbits at the most. Therefore, pseudo SRAM or 1 T SRAM, whose memory cell is the same as DRAM cell, is being adopted for the solution of the high density SRAM applications more than 64 M bits. However, the refresh time limits not only the maximum operation temperature but also nearly all critical electrical characteristics of the products such as stand_by current and random access time. In order to overcome both the size penalty of the conventional 6 T Full CMOS SRAM cell and the poor characteristics of the TFT load cell, we have developed S3 cell. The Load pMOS and the Pass nMOS on ILD have nearly single crystal silicon channel according to the TEM and electron diffraction pattern analysis. In this study, we present $S^3$ SRAM cell technology with 100 nm design rule in further detail, including the process integration and the basic characteristics of stacked single crystal silicon TFT.

Case Study of Shape Design of Load Cell Using Finite Element Method

  • Reaugkittakarn, Saravut;Sripituk, Jettiya;Pongswatd, Sawai;Pannil, Pittaya;Ukakimapurn, Prapart
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2005년도 ICCAS
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    • pp.2054-2057
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    • 2005
  • In this paper, the application of finite element method to design the shape of load cell as an illustrative case study is described. The relationship between the various shapes of load cell and their stress characteristic were analyzed by COSMOS simulation program. The results obtained from the proposed analysis can be applied to determine the appropriate position of strain gauges for good quality load cell. The experimental results show the good efficiency of the proposed technique.

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특징 형상의 간섭 표현에 대한 연구 (A Study on the Expression of Features Interaction)

  • 김경영;이수홍;고희동;김현석
    • 한국CDE학회논문집
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    • 제2권3호
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    • pp.142-149
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    • 1997
  • This study is intended to develop a Feature based modeler. It is difficult to integrate CAD and CAM/CAPP with information that is given only by a conventional CAD system. Therefore a lot of studies have concentrated on a Feature based CAD system. But conventional Feature based modelers have had limitation on providing sufficient information related to Feature interaction. If a Feature based modeler is to be used in assembly simulation, a new Feature-based modeling method needs to be developed. Also to support collision detection between parts, we have to handle Feature interaction systematically. Therefore we suggest Cell data structure which handles interaction of Features by volume. The volume created by Feature interaction is saved as a Cell. With the Cell structure we solve problems involved with Feature interaction. This study shows how the Cell data structure can manage Feature interaction and give enough information in assembly simulation.

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Novel Zero-Current-Switching (BCS) PWM Switch Cell Minimizing Additional Conduction Loss

  • Park, Hang-Seok;Cho, B.H.
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • 제12B권1호
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    • pp.37-43
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    • 2002
  • This paper proposes a new zero-current switching (ZCS) pulse-width modulation (PWM) switch cell that has no additional conduction loss of the main switch. In this cell, the main switch and the auxiliary switch turn on and turn off under zero current condition. The diodes commutate softly and the reverse recovery problems are alleviated. The conduction loss and the current stress of the main switch are minimized, since the resonating current for the soft switching does not flow through the main switch. Based on the proposed ZCS PWM switch cell, a new family of dc to dc PWM converters is derived. The new family of ZCS PWM converters is suitable for the high power applications employing IGBTs. Among the new family of dc to dc PWM converters, a boost converter was taken as an example and has been analyzed. Design guidelines with a design example are described and verified by experimental results from the 2.5㎾ prototype boost converter operating at 40KHz.

Dieletrophoresis를 이용한 초소형 세포융합시스템의 설계 및 해석 (Design and Analysis of the Microfabricated Cell Fusion System using Dielectrophoretic Force)

  • 양성동;이상욱;김용권
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1993년도 정기총회 및 추계학술대회 논문집 학회본부
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    • pp.201-203
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    • 1993
  • Recently, micro-scaled cell fusion system in the bioiogical cell fusion is preferred to Nacro-scaled one by dint of microelectronic processes. The microfabricated cell fusion system has its components such as fusion chamber, selector and detector. In this paper, we describe the design rules of the micro-fabricated cell fusion system using dielectrophoretic force and analyze its components using finite element method.

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