• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.148-150
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• 1988

The output characteristics of VSI by transistor depend upon bias signal with drive circuit. As the CTI is one of the VSI, takes case PWM output voltage. This Inverter operation is based upon position and negative of sinusoldal PWM signal by carrier triangular wave and compared sine one. Besides, the Inverter operation system required digital signal for microprocessor, sampling method of Inverter driver signals study for get rid of generated signal is error. In the paper, the method of 3 level PWM signal for CTI was studied. This method of signals depend upon caculated switching position of natural sampling with $10^{-6}$ modulation error for time flowchart programs.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.4
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• pp.376-382
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• 2014

This paper proposes the pulse width modulation (PWM) control strategy for low-speed operation in the three-level neutral-point-clamped (NPC) inverters based on the bootstrap gate drive circuit. As a purpose of the cost reduction, several papers have paid attention to the bootstrap circuit applied to the three-level NPC inverter. However, the bootstrap gate driver IC cannot generate the gate signal to the IGBT for low-speed operation, because the bootstrap capacitor voltage decreases under the threshold level. For low-speed operation, the dipolar and partial-dipolar modulations can be the effective solution. However, these modulations have drawbacks in terms of the switching loss and THD. Therefore, this paper proposes the PWM control strategy to operate the inverter at low-speed and to minimize the switching loss and harmonics. The experimental results are presented to verify the validity on the proposed method.

• Journal of Electrical Engineering and Technology
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• v.10 no.5
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• pp.2018-2030
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• 2015

A two stage ac drive configuration consisting of a single-phase line commutated rectifier and a three-phase voltage source inverter (VSI) is very common in low and medium power applications. The deterministic pulse width modulation (PWM) methods like sinusoidal PWM (SPWM) could not be considered as an ideal choice for modern drives since they result mechanical vibration and acoustic noise, and limit the application scope. This is due to the incapability of the deterministic PWM strategies in sprawling the harmonic power. The random PWM (RPWM) approaches could solve this issue by creating continuous harmonic profile instead of discrete clusters of dominant harmonics. Insufficient filtering at dc link results in the amplitude distortion of the input dc voltage to the VSI and has the most significant impact on the spectral errors (difference between theoretical and practical spectra). It is obvious that the sprawling effect of RPWM undoubtedly influenced by input fluctuation and the discrete harmonic clusters may reappear. The influence of dc link fluctuation on harmonics and their spreading effect in the VSI remains invalidated. A case study is done with four different filter capacitor values in this paper and results are compared with the constant dc input operation. This paper also proposes an ingenious RPWM, a ripple dosed sinusoidal reference-random carrier PWM (RDSRRCPWM), which has the innate capacity of suppressing the effect of input fluctuation in the output than the other modern PWM methods. MATLAB based simulation study reveals the fundamental component, total harmonic distortion (THD) and harmonic spread factor (HSF) for various modulation indices. The non-ideal dc link is managed well with the developed RDSRRCPWM applied to the VSI and tested in a proto type VSI using the field programmable gate array (FPGA).

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.6
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• pp.488-493
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• 2014

This paper presents a carrier-based pulse-width modulation(PWM) method for reducing the common-mode voltage of a three-level four-leg converter. The idea of the proposed PWM method is intuitive and easy to be implemented in digital signal processor-based converter control systems. On the basis of the analysis of space-vector PWM(SVPWM) and sinusoidal PWM(SPWM) switching patterns, the fourth leg pole voltage of the three-phase converter called "f leg pole voltage" is manipulated to reduce the common-mode voltage. To synthesize f leg pole voltage for the suppression of the common-mode voltage, positive and negative pole voltage references of f leg are calculated. An offset voltage is also deduced to prevent the distortion of a, b, and c phase voltages. The feasibility of the proposed PWM method is verified by simulation and experimental results. The common-mode voltage of the proposed PWM method in peak-to-peak value is 33% in comparison with that of the conventional SVPWM method. The transition number of the common-mode voltage is also reduced to 25%.

• Proceedings of the KIPE Conference
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• 2014.07a
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• pp.211-212
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• 2014

기존의 단방향 동작만 고려한 인버터에서 반송파 기반 PWM 방식의 중성점 전압 제어기법을 양방향 동작의 인버터에 그대로 적용할 경우 역방향 동작에서 중성점 전압이 오히려 벌어지는 문제가 있다. 본 논문에서는 구현이 간단한 반송파 기반 PWM 방식의 중성점 전압 제어기법을 양방향 인버터에 적용하여 인버터의 전류 방향에 상관없이 하나의 제어기로 구현된 제어기법을 제안한다. 제안하는 기법은 양방향 모드전환 시에도 끊김없는 제어가 가능하고 초기 동작과 무부하 동작에서도 중성점 전압의 불평형을 제거할 수 있다. 양방향 T-type 인버터를 제작하여 본 논문에서 제안한 제어기법을 검증 하였다.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.6
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• pp.543-549
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• 2005

This paper presents a carrier-based modulation method for the control of a matrix converter. By using the offset voltage and changing the slope of the carrier, it is possible to synthesize sinusoidal input currents with unity power factor and the desired output voltages. The proposed method is equivalent to the so called SVPWM (Space Vector PWM) method, but its implementation is much easier. Moreover, the proposed method is very attractive because it is possible to apply the 2 phase t 3 phase modulation method, overmodulation method and other methods which are well-developed in the study of voltage source inverters (VSI) to the matrix coverter modulation. The feasibility of the proposed modulation method has been verified by computer simulation and experimental results.

• Proceedings of the KIPE Conference
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• 2004.11a
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• pp.64-69
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• 2004

This paper deals with an algorithm for controlling ac output voltage of Z-source inverter using Modified SVPWM (abbreviated as MSVPWM). Unlike the conventional space vector pulse width modulation, MSVPWM has one extra shoot-through zero time $T_{sh}$. During shoot-through zero time, both switches in a leg are conducted simultaneously in order to boost inverter output voltage to any desirable value regardless the line voltage. The algorithm to control linearly the capacitor voltage is suggested to improve the performance of Z-source inverter system. The performance of Z-source inverter using above algorithms is demonstrated in simulation results using PSIM. Index terms-Z-source inverter (ZSI), shoot-through time, three-phase carrier-based PWM, space vector PWM (SVPWM), modified space vector PWM (MSVPWM).

• Proceedings of the KIPE Conference
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• 2016.11a
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• pp.218-219
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• 2016

This paper present Phase Shifted with carrier based on Sinusoidal PWM(SPWM) by using Cascaded NPC/H-birdge converter. The proposed Phase Shifted PWM method is adding third harmonic injection in switching signal. The advantage of the proposed method is reducing the voltage and capacity of the capacitor. This paper compare general Phase Shifted method with proposed Phase Shifted method that added the third harmonic injection. Each PWM method is tested without considering the switching loss by using PSIM 9.1.4 simulation.

• Journal of Electrical Engineering and Technology
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• v.12 no.5
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• pp.1945-1954
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• 2017

In recent years, several LCL filter design methods for different converter topologies have been published, many of which use analytical expressions to calculate the ideal converter AC voltage harmonic spectrum. This paper presents the LCL filter design methodology but the focus is on presentation and validation of the non-iterative filter design method for a grid-connected three-phase two-level PWM-VSC. The developed method can be adapted for different converter topologies and PWM algorithms. Furthermore, as a starting point for the design procedure, only the range of PWM carrier frequencies is required instead of an exact value. System nonlinearities, usually omitted from analysis have a significant influence on VSC AC voltage harmonic spectrum. In order to achieve better accuracy of the proposed procedure, the system nonlinear model is incorporated into the method. Optimal filter parameters are determined using the novel cost function based on higher frequency losses of the filter. An example of LCL filter design for a 40 kVA grid-connected PWM-VSC has been presented. Obtained results have been used to construct the corresponding laboratory setup and measurements have been performed to verify the proposed method.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2099-2108
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• 2016

The cascaded multilevel converter is widely adopted to medium/high voltage and high power electronic applications due to the small harmonic components of the output voltage and the facilitation of modularity. In this paper, the operation principle of a T-type H-bridge topology is investigated in detail, and a carrier phase shifted pulse width modulation (CPS-PWM) based control method is proposed for this topology. Taking a virtual five-level waveform achieved by a unipolar double frequency CPS-PWM as the output object, PWM signals of the T-type H-bridge can be obtained by reverse derivation according to its switching modes. In addition, a control method for the T-type H-bridge based cascaded multilevel converter is introduced. Then a single-phase T-type H-bridge cascaded multilevel static var generator (SVG) prototype is built, and a repetitive controller based compound current control strategy is designed with the DC-link voltage balancing control scheme analyzed. Finally, simulation and experimental results validate the correctness and feasibility of the proposed modulation method and control strategy for T-type H-bridge based cascaded multilevel converters.