• Advances in materials Research
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• 제1권2호
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• pp.115-128
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• 2012

The structural and electrical properties of $(1-x)Ba(Sm_{1/2}Nb_{1/2})O_3-xBaTiO_3$; ($0{\leq}x{\leq}1$) ceramics were prepared by conventional ceramic technique at $1375^{\circ}C$/7 h in air atmosphere. The crystal symmetry, space group and unit cell dimensions were derived from the X-ray diffraction (XRD) data using FullProf software whereas crystallite size and lattice strain were estimated from Williamson-Hall approach. XRD analysis of the compound indicated the formation of a single-phase cubic structure with the space group Pm m. Dielectric study revealed that the compound $0.75Ba(Sm_{1/2}Nb_{1/2})O_3-0.25BaTiO_3$ is having low and ${\varepsilon}^{\prime}$ and ${\varepsilon}^{{\prime}{\prime}}$ a low $T_{CC}$ (< 5%) in the working temperature range (up to+$100^{\circ}C$) which makes this composition suitable for capacitor application and may be designated as 'Stable Low-K' Class I material as per the specifications of the Electronic Industries Association. The correlated barrier hopping model was employed to successfully explain the mechanism of charge transport in the system. The ac conductivity data were used to evaluate the density of states at Fermi level, minimum hopping length and apparent activation energy of the compounds.

• 한국조명전기설비학회지:조명전기설비
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• 제11권3호
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• pp.88-96
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• 1997

본 논문은 배전시스템에서의 파라미터에 따른 과도현상을 분석하였다. 재투입에 의한 순간전압강하와 개폐서지를 분석하였으며, 이를 위해서 22.9[kV] 배전시스템의 실 데이터를 이용하여 다중접지된 모델 시스템을 구성하였다. EMTP 시뮬레이션을 통하여 주상변압기 2차측 수용가에서의 재투입 영향을 분석하였으며, 사고선로와 인근선로에서의 과도현상을 나타냈었다. 또한 사고위치, 부하크기, 부하역률, 캐패시터뱅크의 크기, 재투입 위상각에 대한 파라미터 분석을 하였고, 이들 요소와 재투입에 의한 과도 현상과의 관계를 나타내었다.

• 한국전자파학회논문지
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• 제11권7호
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• pp.1240-1246
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• 2000

본 논문에서는 유한차분 시간영역 방법을 적용하여 단일 계단형 마이크로스트립 기판 불연속 구조를 해석하였으며, 이 결과를 사용하여 LC 등가회로를 구성하였다. 본 논문에서 제안된 구조는 마이크로스트립 선로의 길이 방향으로 계단형 기판 불연속을 가지며, 패치 안테나의 급전선, 회로 모듈간 연결 등에 적용될 수 있다. FDTD 해석결과는 HFSS를 이용하여 얻어진 결과와 비교하여 잘 일치함을 보였다. 개발된 등가회로는 S11과 S21 모두 2.4% 이내의 정확도를 가지며, 마이크로파 회로의 CAD 설계에 응용될 수 있다.

• Journal of Power Electronics
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• 제11권2호
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• pp.120-131
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• 2011

This paper proposes two control strategies for the bidirectional Z-source inverters (BZSI) supplied by batteries for electric vehicle applications. The first control strategy utilizes the indirect field-oriented control (IFOC) method to control the induction motor speed. The proposed speed control strategy is able to control the motor speed from zero to the rated speed with the rated load torque in both motoring and regenerative braking modes. The IFOC is based on PWM voltage modulation with voltage decoupling compensation to insert the shoot-through state into the switching signals using the simple boost shoot-through control method. The parameters of the four PI controllers in the IFOC technique are designed based on the required dynamic specifications. The second control strategy uses a proportional plus resonance (PR) controller in the synchronous reference frame to control the AC current for connecting the BZSI to the grid during the battery charging/discharging mode. In both control strategies, a dual loop controller is proposed to control the capacitor voltage of the BZSI. This controller is designed based on a small signal model of the BZSI using a bode diagram. MATLAB simulations and experimental results verify the validity of the proposed control strategies during motoring, regenerative braking and grid connection operations.

• Journal of Power Electronics
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• 제16권4호
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• pp.1494-1503
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• 2016

Power quality promotion has received increasing attention because of the wide use of semiconductor devices in recent decades. Reactive power regulation is crucial to ensuring the stable operation of power systems. In this study, a continuous reactive power controller, which is referred to as a parallel-connected magnetic energy recovery switch (MERS), is developed to regulate voltage or power factor in power grids. First, the operating principle is introduced, and a mathematical model is built. Second, a new control method for restraining current harmonics and the peak voltages of capacitors is presented. Using the proposed method, the MERS shows a wide range in terms of reactive power compensation. Finally, the performance of the proposed controller is demonstrated through computer simulations and experiments. Unlike STATCOMs, the proposed controller entails low losses, adopts a small dc capacitor, and offers ease of use.

• 전기학회논문지
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• 제63권8호
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• pp.1046-1054
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• 2014

In this paper, a hardware prototype for the 10kVA 11-level MMC was built and various experimental works were conducted to verify the operation algorithms of MMC. The hardware prototype was designed using computer simulation with PSCAD/EMTDC software. After manufactured in the lab, the hardware prototype was tested to verify the modulation algorithms to form the output voltage, the balancing algorithm to equalize the sub-module capacitor voltage, and the redundancy operation algorithm to improve the system reliability. The developed hardware prototype can be utilized for analyzing the basic operation and performance improvement of MMC according to the modulation and redundancy operation scheme. It also can be utilize to analyze the basic operational characteristics of HVDC system based on MMC.

• 전기학회논문지
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• 제63권8호
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• pp.1055-1063
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• 2014

Power losses of a 1-stage DC-DC converter and 2-stage DC-DC converter are compared in this paper. A phase-shift full-bridge DC-DC converter is considered as 1-stage topology. This topology has disadvantages in the stress of rectifier diodes because of the resonance between the leakage inductor of the transformer and the junction capacitor of the rectifier diode. 2-stage topology is composed of an LLC resonant full-bridge DC-DC converter and buck converter. The LLC resonant full-bridge DC-DC converter does not need an RC snubber circuit of the rectifier diode. However, there is the drawback that the switching loss of the buck converter is large due to the hard switching operation. To reduce the switching loss of the buck converter, SiC MOSFET is used. This paper analyzes and compares power losses of two topologies considering temperature condition. The validity of the power loss analysis and calculation is verified by a PSIM simulation model.

• 전력전자학회논문지
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• 제17권3호
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• pp.266-273
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• 2012

In this paper, the new open fault detection and tolerant operation method for 3 phase PWM rectifier is proposed. When open fault occurred on the inverter switches of 3 Phase PWM rectifier, the DC link voltage ripple is increased because the input current of the faulty phase is distorted. In this case, the quality of electric power would decrease, and the life time of DC link capacitor is decreased. The open fault is detected by a simple MRAS(Model Reference Adaptive System) without additional hardware sensors, and the tolerant operation carried out by turning on the opposite switch of the faulty switch without any redundancy. By the proposed method, the faulty phase input current can be controlled, so that 3-phase input current is balanced relatively under the faulty condition and the voltage ripple of DC link output is reduced. The validity of the proposed technique is proved on the 6kW 3-phase PWM rectifier system by simulation and experiment.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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• pp.320-321
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• 2006

In this work, impedance Spectroscopic analysis was applied to study the effect of plasma treatment on the surface of indium-tin oxide (ITO) anodes using $CF_4g$ as and to model the equivalent circuit for organic light emitting diodes (OLEDs) with the $CF_4$ plasma treatment of ITO surface at the anodes. This device with ITO/TPD/$Alq_3$/LiF/Al structure can be modeled as a simple combination of a resistor and a capacitor. The $CF_4$ plasma treatment on the surface of ITO shifts the vacuum level of the ITO as a result of which the barrier height for hole injection at the ITO/organic interface is reduced. The Impedance spectroscopy measurement of the devices with the $CF_4$ plasma treatment on the surface of ITO anodes shows change of values in parallel resistance ($R_p$) and parallel capacitance ($C_p$).

• Journal of Power Electronics
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• 제13권5호
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• pp.746-756
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• 2013

The modularized subunit of an electronic power transformer (EPT) is a series connection of two H-bridge voltage-source converters and a DC-DC converter with a high-frequency isolation transformer (HFIT). On the basis of cascading and paralleling the modularized subunits, EPT can be used in high-voltage and large-current applications in the power system. This paper discusses the steady state analysis of the modularized subunit of EPT. Theoretical analysis considers the influences of the two H-bridge voltage-source converters on the two sides of the DC-DC converter. We deduce the formulas of the theoretical calculation on the internal electrical characteristics of EPT (e.g., the voltages of the DC-bus capacitor and the primary side peak current of the HFIT). This paper provides guidance on the design and selection of EPT key elements (e.g., the DC-bus capacitors and HFIT). Experimental results are obtained from a single subunit of a laboratory model rated at 962 V, 15 kVA. All calculations, simulations, and experiments confirm the theoretical analysis of the subunit of EPT.