• Proceedings of the Korean Institute of Building Construction Conference
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• 2008.05a
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• pp.203-207
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• 2008

The results of the status analysis for the safety accident are as followings which is prepared for the purpose of collecting a basic data for securing residential safety in houses and buildings. (1) As for the safety accidents of the aged in houses, 66% of all safety accidents were slipping and falling and there was no serious difference in frequencies of accidents according to the places. (2) As for the safety accidents of children in houses, 74% of all safety accidents concentrated on bedrooms and living rooms and the majority types of accidents related to architectural matters were bumping, slipping, and falling.(3) There was striking difference in the frequency of safety accidents in houses between aged and children, according to places and types of accidents.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.332-336
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• 2001

In this study, the reaction at UBM(Under Bump Metallurgy) and solder interface was investigated. The UBM employed in conventional optical packages, Au/Pt/Ti layer, were found to dissolve into molten Au-Sn eutectic solder during reflow soldering. Therefore, the reaction with different diffusion barrier layer such as Fe, Co, Ni were investigated to replace the conventional Pt layer. The reaction behavior was investigated by reflowing the solder on the pad of the metals defined by Cr layer for 1, 2, 3, 4, and 5 minutes at $330^{\circ}C$. Among the metals, Co was found to be most suitable for the diffusion barrier layer as the wettability with the solder was reasonable and the reaction rate of intermetallic formation at the interface is relatively slow.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.05a
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• pp.661-662
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• 2006

This research is on a laser soldering using the micro solder-balls used in flip chip packaging process. A laser source used in laser soldering is Nd:YAG laser(250W and 60W). Solder-balls of 100, 300, $500{\mu}m$ size are used in experiments. The laser head to deliver a laser beam and the nozzle to transfer solder-balls are manufactured to bump solder-balls. After soldering solder-balls the shear test is carried out to determine the wetting at the interface between the surface and a solder-balls With the results of solder bumping tests a laminated molding is accomplished for manufacturing the three dimensional molding.

• Transactions of the Korean Society of Automotive Engineers
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• v.8 no.5
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• pp.138-147
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• 2000

Vehicle suspension systems are parts which effect performances of a vehicle such as ride quality, handing characteristics, straight performance and steering effort etc. Kinematic design is a decision of joints` position for straight performance and steering effort. But, when vehicle is rebounding and bumping, chang of joints` displacement is nonlinear and a surmise of straight performance and steering effort at that joints` position is difficult. So design of suspension systems is done through a inefficient method of tried-and-error depending on designer`s experience. In this paper, kinematic design of suspension systems was done through the optimal design using a genetic algorithm. For this optimal design, the function for quantification of straight performance and steering effort was made, and the kinematic design method of suspension systems having this function as the objective function was suggested.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2005.05a
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• pp.79-83
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• 2005

IT 기술, 반도체 산업 등의 급격한 발전에 힘입어 최근의 첨단 전자, 통신제품은 초경량 초소형화와 동시에 고기능 복합화의 발전 추세를 보이고 있다. 이런 추세에 발맞추어 전자제품, 통신제품의 핵심적인 부품인 IC chip도 소형화되고 있다. IC chip 패키징 기술의 하나인 Filp Chip Package는 Module Substrate 위에 Chip Surface를 Bumping 시킴으로서 최단의 접속길이와 저열저항, 저유전율의 특성도 가지면서 초소형에 높은 수율의 저 원가생산성을 갖는 첨단의 패키징 기술이다. 이런 패키징 기술은 수요증가와 더불어 폭발적으로 늘어나고 있으나 까다로운 공정기술에 의해 아직 여러 회사에서 장비가 출시되고 있지 못한 상태이다. 이에 본 연구에서는 최근 수요가 증가하는 LCD Driver IC용 COF 장비를 위한 Flip chip Bonding 장비 및 시스템을 설계, 제작하였다.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.09a
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• pp.165-172
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• 2003

Wafer-level packaging technology has become established with increase of demands for miniaturizing and realizing lightweight electronic devices evolution. This packaging technology enables the smallest footprint of packaged chip. Various structures and processes has been proposed and manufactured currently, and products taking advantages of wafer-level package come onto the market. The package enables mounting semiconductor chip on print circuit board as is a case with conventional die-level CSP's with BGA solder bumps. Bumping technology is also advancing in both lead-free solder alternative and wafer-level processing such as stencil printing using solder paste. It is known lead-free solder bump formation by stencil printing process tend to form voids in the re-flowed bump. From the result of FEM analysis, it has been found that the strain in solder joints with voids are not always larger than those of without voids. In this paper, characteristics of wafer-level package and effect of void in solder bump on its reliability will be discussed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.332-336
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• 2001

In this study, the reaction at UBM(Under Bump Metallurgy) and solder interface was investigated. The UBM employed in conventional optical packages, Au/Pt/Ti layer, were found to dissolve into molten Au-Sn eutectic solder during reflow soldering. Therefore, the reaction with different diffusion barrier layer such as Fe, Co, Ni were investigated to replace the conventional R layer. The reaction behavior was investigated by reflowing the solder on the pad of the metals defined by Cr layer for 1, 2, 3, 4, and 5 minutes at 330$^{\circ}C$. Among the metals, Co was found to be most suitable for the diffusion barrier layer as the wettability with the solder was reasonable and the reaction rate of intermetallic formation at the interface is relatively slow.

• Tribology and Lubricants
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• v.28 no.4
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• pp.173-177
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• 2012

We used contact resonance force microscopy (CRFM) technique to determine the quantitative elastic properties of multiple materials integrated on the sub micrometer scale. The CRFM approach measures the frequencies of an AFM cantilever's first two flexural resonances while in contact with a material. The plain strain modulus of an unknown or test material can be obtained by comparing the resonant spectrum of the test material to that of a reference material. In this study we examined the following bumping materials for flip chip by using copper electrode as a reference material: NiP, Solder (Sn-Au-Cu alloy) and under filled epoxy. Data were analyzed by conventional beam dynamics and contact dynamics. The results showed a good agreement (~15% difference) with corresponding values determined by nanoindentaion. These results provide insight into the use of CRFM methods to attain reliable and accurate measurements of elastic properties of materials on the nanoscale.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.45-48
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• 2003

This research presents an approach to simultaneously detect the faults and measure the length of the electric cables. This approach is easy to use and inexpensive. Moreover, it can be applied to any kinds and sizes of the electric cable. This paper uses 750V $4{\times}4$ Sq.mm. cables. The concept is to send the 2 kHz pulse into the electric cable. When the pulse bumps into the fault, it bounces back. Then, the total time the pulse travels back and forth and the shape of the pulse after bumping are inspected using the pulse detector and pulse converter. Next, the signal obtained is modulated with 10 MHz carrier pulse to segregate into several small pulses before sending to 8-bit counter. The length of the electric cable can be obtained using microcontroller and the location of the faults can be seen on the LCD screen. This approach can be used to inspect the electric cables with the length of at least 15 m.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.9
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• pp.749-755
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• 2007

Recently, novel MEMS probe cards can support reliable wafer level chip test with high density probing capacity. However, manufacturing cost and process complexity are crucial weak points for low cost mass production. To overcome these limitations, we have developed micro spring structured MEMS probe card. For fabrication of micro spring module, a wire bonder and electrolytic polished gold wires are used. In this case, stringent tension force control is essential to guarantee the low level contact resistance of micro spring for reliable probing performance. For this, relation between tension force of fabricated probe card and contact resistance is characterized. Compare to conventional probe cards, developed MEMS probe card requires fewer fabrication steps and it can be manufactured with lower cost than other MEMS probe cards. Also, due to the small contact scratch patterns, we expect that it can be applied to bumping types chip test which require higher probing density.