• KCID journal
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• v.3 no.1
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• pp.10-19
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• 1996

A hydraulic model test was peformed for radial gate in estuary sulices to find out a proper bottom shape of gate which minimize the amplitudes of vibration. Firstly natural frequencies ore measured, and the results were compared with the numerical analysi

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.543-545
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• 2009

With injection-type source delivery system of atomic layer deposition (ALD), bottom-contact and bottom-gate thin-film transistors (TFTs) were fabricated with a poly-4-vinyphenol polymeric dielectric for the first time. The properties of the ZnO TFT were greatly influenced by the device structure and the process conditions. The zinc oxide TFTs exhibited a channel mobility of 0.43 $cm^2$/Vs, a threshold voltage of 0.85 V, a subthreshold slope of 3.30 V/dec, and an on-to-off current ratio of above $10^6$ with solid saturation.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.5
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• pp.315-318
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• 1999

We have proposed and fabricated the new bottom-gated polycrystalline silicon (poly-Si) thin film transistor (TFT) with a partial amorphous-Si region by employing the selective laser annealing. The channel layer of the proposed TFTs is composed of poly-Si region in the center and a-Si region in the edge. The TEM image shows that the local a-Si region is successfully fabricated by the effective cut out of the incident laser light in the upper a-Si layer. Our experimental results show that the ON/OFF current ratio is increased significantly by more than three orders in the new poly-Si TFT compared with conventional poly-Si TFT. The leakage current is decreased significantly due to the highly resistive a-Si re TFTs while the ON-series resistance of the local a-Si is reduced significantly due to the considerable inducement of electron carriers by the positive gate bias, so that the ON-current is not decreased much.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.4
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• pp.885-890
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• 2014

This paper has presented the change of subthreshold swings for gate oxide thickness of asymmetric double gate(DG) MOSFET, and solved Poisson equation to obtain the analytical solution of potential distribution. The Gaussian function as doping distribution is used to approch experimental results. The symmetric DGMOSFET is three terminal device. Meanwhile the asymmetric DGMOSFET is four terminal device and can separately determine the bias voltage and oxide thickness for top and bottom gates. As a result to observe the subthreshold swings for the change of top and bottom gate oxide thickness, we know the subthreshold swings are greatly changed for gate oxide thickness. Especially we know the subthreshold swings are increasing with the increase of top and bottom gate oxide thickness, and top gate oxide thickness greatly influences subthreshold swings.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.12
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• pp.120-127
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• 2016

This study examined the dynamic characteristics of the gate to identify the optimal gate installation direction according to the installation direction. A 1:31 scale model was constructed for a 47.5m prototype gate using acrylic. The scaled weights were tuned by adding lead weights. The first step was to measure the natural frequencies of the model gates, and compare them with finite-element analysis of the prototypes as a calibration. The scaled model was tested in a 1.6 m wide concrete flume for two orientations to determine the effects of the gate orientation on structural vibrations. Vertical vibrations were measured under a range of operational conditions, including a range of bottom opening heights and different upstream and downstream water levels. For large bottom opening heights in the normal direction, relatively large vibrations were induced by vortices shed at the plate bottom that would strike the horizontal truss member. This phenomenon was avoided in the reverse direction. For small bottom opening heights in the normal direction, these vibrations were caused by a suction force that developed at the gate bottom. The gate model in the reverse direction was preferred because of its low overall vibrational response under general gate opening and flow level combinations.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.04a
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• pp.39-40
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• 2008

We have examined post-annealing and passivation for the transparent bottom gate IGZO TFT having an inverse co-planar structure. The oxygen-vacuum two step annealing enhanced the field effect mobility up to 18 $cm^2$/Vsandthesub-threshold swing down to 0.2V/dec. However, the hysterysis and the bias stability problems could not be solved just by post-annealing. Thus, we have passivated the bottom gate IGZO TFTs with organic and inorganic materials. $Ga_2O_3$, $Al_2O_3$, $SiO_2$ and some polymer materials were effective materials for passivations. The hysterysis and the stability of the TFTs were remarkably improved by the passivations. We have manufactured the AMOLED panel with the transparent bottom gate IGZO TFT array successfully.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.698-701
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• 2013

This paper has presented the change of subthreshold swings for gate oxide thickness of asymmetric double gate(DG) MOSFET, and solved Poisson equation to obtain the analytical solution of potential distribution. The symmetric DGMOSFET is three terminal device. Meanwhile the asymmetric DGMOSFET is four terminal device and can separately determine the bias voltage and oxide thickness for top and bottom gates. As a result to observe the subthreshold swings for the change of top and bottom gate oxide thickness, we know the subthreshold swings are greatly changed for gate oxide thickness. Especially we know the subthreshold swings are increasing with the increase of top and bottom gate oxide thickness, and top gate oxide thickness greatly influences subthreshold swings.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1341-1342
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• 2006

Electrical characteristics of field-effect thin film transistors (TFTs) with p-channels of CdTe/CdHgTe core-shell nanocrystals are investigated in this paper. For the fabrication of bottom- and top-gate TFTs, CdTe/CrHgTe nanocrystals synthesized by colloidal method are first dispersed on oxidized p+ Si substrates by spin-coating, the dispersed nanoparticles are sintered at $150^{\circ}C$ to form the channels for the TFTs, and $Al_{2}O_{3}$ layers are deposited on the channels. A representative bottom-gate field-effect TFT with a bottom-gate $SiO_2$ layer exhibits a mobility of $0.21cm^2$/ Vs and an Ion/Ioff ratio of $1.5{\times}10^2$ and a representative top-gate field-effect TFT with a top-gate $Al_{2}O_{3}$ layer provides a field-effect mobility of $0.026cm^2$/ Vs and an Ion/Ioff ratio of $2.5{\times}10^2$. $Al_{2}O_{3}$ was deposited for passivation of CdTe/CdHgTe core-shell nanocrystal layer, resulting in enhanced hole mobility, Ior/Ioff ratio by 0.25, $3{\times}10^3$, respectively. The CdTe/CdHgTe nanocrystal-based TFTs with bottom- and top gate geometries are compared in this paper.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.11
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• pp.2709-2714
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• 2014

This paper has analyzed the change of threshold voltage and conduction path for the ratio of top and bottom gate oxide thickness of asymmetric double gate MOSFET. The asymmetric double gate MOSFET has the advantage that the factor to be able to control the current in the subthreshold region increases. The analytical potential distribution is derived from Poisson's equation to analyze the threshold voltage and conduction path for the ratio of top and bottom gate oxide thickness. The Gaussian distribution function is used as charge distribution. This analytical potential distribution is used to derive off-current and subthreshold swing. By observing the results of threshold voltage and conduction path with parameters of bottom gate voltage, channel length and thickness, projected range and standard projected deviation, the threshold voltage greatly changed for the ratio of top and bottom gate oxide thickness. The threshold voltage changed for the ratio of channel length and thickness, not the absolute values of those, and it increased when conduction path moved toward top gate. The threshold voltage and conduction path changed more greatly for projected range than standard projected deviation.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.527-530
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• 2009

We report on the fabrication of ZnO-based dual gate (DG) thin-film transistors (TFTs) with 20 nm-thick $Al_2O_3$ for both top and bottom dielectrics, which were deposited by atomic layer deposition on glass substrates at $200^{\circ}C$. Whether top or bottom gate is biased for sweep, our TFT almost symmetrically operates under a low voltage of 5 V showing a field mobility of ~0.4 $cm^2/V{\cdot}s$ along with the on/off ratio of $5{\times}10^4$. The threshold voltage of our DG TFT was systematically controlled from 0.5 to 2.0 V by varying counter gate input from +5 to -2 V.