• Title/Summary/Keyword: block design

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An Efficient Hardware Implementation of AES Rijndael Block Cipher Algorithm (AES Rijndael 블록 암호 알고리듬의 효율적인 하드웨어 구현)

  • 안하기;신경욱
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.12 no.2
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    • pp.53-64
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    • 2002
  • This paper describes a design of cryptographic processor that implements the AES (Advanced Encryption Standard) block cipher algorithm, "Rijndael". An iterative looping architecture using a single round block is adopted to minimize the hardware required. To achieve high throughput rate, a sub-pipeline stage is added by dividing the round function into two blocks, resulting that the second half of current round function and the first half of next round function are being simultaneously operated. The round block is implemented using 32-bit data path, so each sub-pipeline stage is executed for four clock cycles. The S-box, which is the dominant element of the round block in terms of required hardware resources, is designed using arithmetic circuit computing multiplicative inverse in GF($2^8$) rather than look-up table method, so that encryption and decryption can share the S-boxes. The round keys are generated by on-the-fly key scheduler. The crypto-processor designed in Verilog-HDL and synthesized using 0.25-$\mu\textrm{m}$ CMOS cell library consists of about 23,000 gates. Simulation results show that the critical path delay is about 8-ns and it can operate up to 120-MHz clock Sequency at 2.5-V supply. The designed core was verified using Xilinx FPGA board and test system.

Study on the computer aided design of lathe feed diriving unit (선반의 이송장치부의 컴퓨터이용설계에 관한 연구)

  • 염영하;이장무;이원희
    • Journal of the korean Society of Automotive Engineers
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    • v.5 no.1
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    • pp.63-78
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    • 1983
  • As a basic study on the machine tools of modular structure, a Computer Aided Design of feed driving unit and an optimization of the dynamic characteristics of a machine tool structure are carried out.. Computer-aided design technique enables designers to save time and to easily do the job in variant design by effectively documenting design techniques and data. In this study a computer program package was developed for automatic design of a proper feed driving units by utilizing building block principle of OIWA CADET.

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Design of PCI Express Physical Layer IP (PCI Express 물리계층의 IP 설계)

  • 권영민;성광수
    • Proceedings of the IEEK Conference
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    • 2003.11b
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    • pp.41-44
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    • 2003
  • In this paper, we propose design of PCI Express Physical Layer for IP. The proposed design is compatible with PCI Express Base specification Revision 1.0a. and supports only single Lane. The best feature of this design is that Physical Layer includes Power Management block. Therefor, the entire design of PCI Express component is simplified. In the near future, as optimizing this design and extending Lane, we will redesign Physical Layer.

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Optimum Structural Design of Panel Block Considering the Productivity (생산성을 고려한 평블록의 최적 구조 설계)

  • Lee, Joo-Sung;Kim, Jong-Mun
    • Journal of the Society of Naval Architects of Korea
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    • v.44 no.2 s.152
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    • pp.139-147
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    • 2007
  • The ultimate goal of structural design is to find the optimal design results which satisfies both safety and economy at the same time. Optimum design has been studied for the last several decades and is being studied. in this study, an optimum algorithm which is based on the genetic algorithm has been applied to the multi-object problem to obtain the optimum solutions which minimizes structural weight and construction cost of panel blocks in ship structures at the same time. Mathematical problems are dealt at first to justify the reliability of the present optimum algorithm. And then the present method has been applied to the panel block model which can be found in ship structures. From the present findings it has been seen that the present optimum algorithm can reasonably give the optimum design results.

Finite Element Analysis of Engine Cylinder Block and Main Bore for Reliable Design (신뢰성 설계를 위한 엔진 실린더 블록과 메인 보어의 유한요소해석)

  • Yang Chulho;Han Moonsik
    • Transactions of the Korean Society of Automotive Engineers
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    • v.13 no.4
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    • pp.39-48
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    • 2005
  • Finite element analyses have been performed for the purpose of obtaining the robust and reliable design of engine cylinder block. Fatigue under high cycle operating loads is a primary concern and is evaluated by a probabilistic method. The robust and reliable design by a probabilistic method can provide satisfactory design conditions for the performance of the system under the influence of noise factors. Therefore, the design by this method will be desensitized to the uncontrollable noise factors. The simple methodology evaluates the distortion of main bore is proposed for the purpose of maintaining a well-controlled clearance between the crankshaft and main bores. The proposed methodology has proven a capability of predicting the distortion of the main bore under assembly, thermal, and firing loads. The calculated results are correlated well with the experimental ones.

A Study on Constructing the High Efficiency Switching Function based on the Modular Techniques (모듈러 기술에 기반을 둔 고효율 스위칭함수 구성에 관한 연구)

  • Park, Chun-Myoung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2019.05a
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    • pp.398-399
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    • 2019
  • This paper presents a method of the circuit design of the multiple-valued digital logic switching functions based on the modular techniques. Fisr of all, we introduce the necessity, background and concepts of the modular design techniques for the digital logic systems. Next, we discuss the definitions that are used in this paper. For the purpose of the circuit design for the multiple-valued digital logic switching functions, we discuss the extraction of the partition functions. Also we describe the construction method of the building block, that is called the modules, based on each partition functions. And we apply the proposed method to the example, we compare the results with the results of the earlier methods. In result, we decrease the control functions, it means that we obtain the effective cost in the digital logic design for any other earlier methods. In the future research, we require the universal module that traet more partition functions and more compact module.

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Optimal design method of bulbous bow for fishing vessels

  • Tran, Thai Gia;Van Huynh, Chinh;Kim, Hyun Cheol
    • International Journal of Naval Architecture and Ocean Engineering
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    • v.13 no.1
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    • pp.858-876
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    • 2021
  • Although widely used, the design of the bulbous bow for ships has been difficult due to the complex interference between the wave system generated by the bulb and the wave system of the ship hull. Until now, a bulbous bow has been often designed using Kracht charts, which were established based on model test data, but these charts apply only to ships with a block coefficient CB = 0.56-0.82, Froude number Fn = 0.20-0.40, and the obtained bulb sizes are only close to optimal. This paper presents a new method for the optimal design of bulbous bow, starting from the design of an initial bulb using Kracht charts for ships with any block coefficient or Froude number, then resizing this initial bulb to define the optimal bulb sizes based on a multi-objective function of the required power reduction, and a combined solution of Computation Fluid Dynamics (CFD) analysis and surrogate models. This study was applied to a fishing vessel FAO 75, which has been model tested and used to design steel fishing vessels in Vietnam recently. The obtained quantitative results showed the same trend as the theory and practice, with a reduction of the ship's required power by about 14%.

Design and Implementation of a 128-bit Block Cypher Algorithm SEED Using Low-Cost FPGA for Embedded Systems (내장형 시스템을 위한 128-비트 블록 암호화 알고리즘 SEED의 저비용 FPGA를 이용한 설계 및 구현)

  • Yi, Kang;Park, Ye-Chul
    • Journal of KIISE:Computer Systems and Theory
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    • v.31 no.7
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    • pp.402-413
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    • 2004
  • This paper presents an Implementation of Korean standard 128-bit block cipher SEED for the small (8 or 16-bits) embedded system using a low-cost FPGA(Field Programmable Gate Array) chip. Due to their limited computing and storage capacities most of the 8-bits/16-bits small embedded systems require a separate and dedicated cryptography processor for data encryption and decryption process which require relatively heavy computation job. So, in order to integrate the SEED with other logic circuit block in a single chip we need to invent a design which minimizes the area demand while maintaining the proper performance. But, the straight-forward mapping of the SEED specification into hardware design results in exceedingly large circuit area for a low-cost FPGA capacity. Therefore, in this paper we present a design which maximize the resource sharing and utilizing the modern FPGA features to reduce the area demand resulting in the successful implementation of the SEED plus interface logic with single low-cost FPGA. We achieved 66% area accupation by our SEED design for the XC2S100 (a Spartan-II series FPGA from Xilinx) and data throughput more than 66Mbps. This Performance is sufficient for the small scale embedded system while achieving tight area requirement.

A Study on the Spatial Characteristics for the Public Area in the City Hotels Lobby - Focused on First Class Hotels in Seoul - (도시호텔에 나타난 공용부문의 공간 구성적 특성에 관한 연구 - 서울시 특급 호텔을 중심으로 -)

  • 이창노;강건희
    • Korean Institute of Interior Design Journal
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    • no.40
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    • pp.94-101
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    • 2003
  • This study is mentioning about basic information and guide related block types, through a comparison and an analysis of floor types which is shown as function in block types and public interior spaces. For the range of this survey, it is defind in the beginning of 1970' s to the end of 1990' s which was rapidly developed in hotel industry and also is chosen by 12 places in the first class hotels. On the purpose of this study is written by designing the basic information of architectures, new hotels which are built and managed in urban, refer to the survey and analysis of the characteristic in hotel. The following is conclusion by based on pre-survey of the analysis of a plan and a site in these hotels. First, as a result of analysis in block type, there are equally distributed in three types (in-type, combination type, close-type), except a atrium type exception, in 12 hotels(100%). Second, as a result of analysis of function type in public interior space, Con-course type is consist of 7(58%), Hall type is 5(42%) in the type of room in public interior space, in 12 hotels(100%). Third, the type in lobby on space plan are equally shown by the type of lobby in center(4PL.), of lounge in center(4PL.), and a compromising type(4PL.).

Site Monitoring of the Retaining Wall Reinforced by Geogrids with Block Type Facings (지오그리드 보강토 옹벽의 계측평가)

  • Kim, Jin-Man;Lee, Dae-Young;Ma, Sang-Joon
    • Journal of the Korea institute for structural maintenance and inspection
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    • v.10 no.1
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    • pp.106-114
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    • 2006
  • Uses of geosynthetics as a reinforcing material for earth structures have ever increased due to their excellent economy. fine external appearance. and easy construction. In the current practice of geosynthetics. however, the lacks of the standardized method of evaluating the soil/geosynthetics friction properties and the inconsistency of conventional design methods develop confusion to the civil engineers. The purpose of site monitoring of the retaining wall reinforced by geogrids was to evaluate the applicability of existing design methods to, and performance of. CHAMSTONE wall system. Full scale field performance during and after construction was monitored by incorporating instrumentation including strain gauges on the geogrid and soil pressure cells. The difference of the reinforcing effects of geosynthetics embedded in the soil will be also investigated by comparing of the line and curve types of retaining wall reinforced by geogrids with block type facings.