• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.3
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• pp.235-242
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• 2020

This paper proposes a system that can manage and verify personal career information through a block chain to solve the problem of getting a job by forging an individual's career when hiring employees. Blockchain network uses private network, and inside the block, the user's academic and career information is kept. The functions of the block chain perform the functions of block creation, block internal data retrieval, career and academic verification, which works through chain code. As a result of the performance evaluation of the proposed system, the processing time per transaction was measured at approximately 110 ms and the search time was measured at 10 ms, and it was applied to the actual system to confirm that it was available.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.24 no.6 s.177
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• pp.1479-1490
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• 2000

The design process of the motor driven tilt/telescopic steering column is established by axiomatic design approach in conceptual design stage. By selecting independent design variables for improvin g performance of the steering system, each detailed design can be carried out independently. In the detailed design, the safety in crash environment and vibration reduction are considered. An occupant analysis code SAFE(Safety Analysis For occupant crash Environment) is utilized to simulate the body block test. Segments, contact ellipsoids and spring-damper elements are used to model the steering column in SAFE. The model is verified by the result of the body block test. After the model is validated, the energy absorbing components are designed using an orthogonal array. Occupant analyses are performed for the cases of the orthogonal array. Final design is determined for the minimum occupant injury. For vibrational analysis, a finite element model of the steering column is defined for the modal analysis. The model is validated by the vibration experiment. Size and shape variables are selected for the optimization process. An optimization is conducted to minimize the weight subjected to various constraints.

• CDE review
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• v.3 no.2
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• pp.34-40
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• 1997

• Journal of the Korean Data and Information Science Society
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• v.22 no.2
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• pp.245-253
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• 2011

Powers of rank transformed statistic for testing main effects and interaction effects for $2{\times}2$ factorial design in randomized complete block design are very superior to powers of parametric statistic without regard to the block size, composition method of effects and the type of population distributions such as exponential, double exponential, normal and uniform. $2{\times}2$ factorial design in RCBD increases error effects and decreases powers of parametric statistic which results in conservativeness. However powers of rank transformed statistic maintain relative preference. In general powers of rank transformed statistic show relative preference over those of parametric statistic with small block size and big effect size.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.1
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• pp.60-63
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• 2009

In this paper, Designed and implemented about module that generate division signal for uplink section and downlink section for controlling Tx/Rx antenna of 2.3-2.7GHz WiMAX TDD repeater. It is consisted of RF block and Baseband block, and because function of this module is that synchronize with WiMAX signal and create division signal for uplink section and downlink section, this module was designed only received path. And because of manufacturing of most RF block by one chip, this module could minimize area. And in baseband block, used the WiMAX Modem to detect Preamble and DL-MAP information of WiMAX signal. This design can process about 2.3-2.7GHz WiMAX.

• Computers and Concrete
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• v.3 no.1
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• pp.17-28
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• 2006

Replacement of actual stress distribution in a reinforced concrete (RC) flexural member with a simpler geometrical shape, which maintains magnitude and location of the resultant compressive force, is an acceptable conceptual trick. This concept was originally perfected for normal strength concrete. In recent years, high strength concrete (HSC) has been introduced and widely used in modern construction. The stress block parameters require updating to account for special features of HSC in the design of flexural members. In future, more varieties of concrete may be developed and a corresponding design procedure of RC flexural members will be required. The usual practice is to conduct large number of experiments on various sizes of specimen and then evolve an empirical relation. This paper presents a numerical procedure through which the stress block parameters can be numerically derived for a given strain ratio variation. The material model for concrete is presented and computational procedure is described. This procedure is illustrated with several variations of strain ratio. The advantages of numerical procedure are that it costs less and it can be used with new material models for any new variety of concrete.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.05a
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• pp.401-403
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• 2015

This paper describes an efficient hardware design of 128-bit block cipher algorithm LEA(lightweight encryption algorithm). In order to achieve area-efficient and low-power implementation, round block and key scheduler block are optimized to share hardware resources for encryption and decryption. The key scheduler register is modified to reduce clock cycles required for key scheduling, which results in improved encryption/decryption performance. FPGA synthesis results of the LEA processor show that it has 2,364 slices, and the estimated performance for the master key of 128/192/256-bit at 113 MHz clock frequency is about 181/162/109 Mbps, respectively.

• 제어로봇시스템학회:학술대회논문집
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• 1991.10a
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• pp.226-231
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• 1991

A graphic control language using function block diagram approach is designed and implemented, applicable to real-time control for continuous process automation system. The procedure implementing the control language is composed of three parts, editor, compiler, and executer. The editor generates the control algorithm file, which contains function block information in the text form, by menu-driven method on the color graphic screen. The compiler translates the contents of the control algorithm file to machine codes and their related data. Then, the executer generates a task that makes the machine codes executed at every sampling period in the target processor. The validity of the concept in its design and implementaion is assured by on-line simulation in the multi-function controller designed for continuous process automation.

• Korean Journal of Computational Design and Engineering
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• v.21 no.2
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• pp.177-185
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• 2016

In this paper, an optimal planning system for operating transporters in shipyard is developed. The system is designed to utilize the geometries of shipyard, and manage the data of blocks and transporters directly. There are four major menus such as shipyard map management based on GIS, block transportation request, transporter management, and optimal transportation planning in the system. The geometries and properties of the shops, roads, and addresses are manipulated in the shipyard map management menu. The block transportation requests and the properties of transporters are managed in the block transportation request and transporter management menus, respectively. The optimum transportation is planned automatically for minimizing the unload times of the transporters, and the optimum transportation plans are confirmed and printed to the transporter drivers. The effectiveness of the system was verified through the application to a large-sized shipyard.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.54 no.2
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• pp.124-130
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• 2005

In this paper, low-power design and implementation techniques for DWT(Discrete Wavelet Transform) of the JPEG2000 compression are proposed. In DWT block of the JPEG2000, linear phase 9 tap and 7 tap filters are used. For low-power implementation of those filters, processor technique for DA(Distributed Arithmetic) filter and minimization technique for number of addition in CSD(Canonic Signed Digit) filter are utilized. Proposed filter structure consists of 3 blocks. In the first CSD coefficient block, every possible 4 bit CSD coefficients are calculated and stored. In second processor block, multiplication is done by MUX and addition processor in terms of the binary values of filter coefficient. Finally, in third block, multiplied values are output and stored in flip-flop train. For comparison of the implementation area and power dissipation, proposed and conventional structures are implemented by using Verilog-HDL coding. In simulation, it is shown that 53.1% of the implementation area can be reduced comparison with those of the conventional structure.