Design and Implementation of Low-Power DWT Processor for JPEG2000 Compression of Medical Images

의료영상의 JPEG2000 압축을 위한 저전력 DWT 프로세서의 설계 및 구현

  • 장영범 (상명대 공대 정보통신공학과) ;
  • 이원상 (상명대 공대 정보통신공학과) ;
  • 유선국 (연세대 의학공학교실)
  • Published : 2005.02.01

Abstract

In this paper, low-power design and implementation techniques for DWT(Discrete Wavelet Transform) of the JPEG2000 compression are proposed. In DWT block of the JPEG2000, linear phase 9 tap and 7 tap filters are used. For low-power implementation of those filters, processor technique for DA(Distributed Arithmetic) filter and minimization technique for number of addition in CSD(Canonic Signed Digit) filter are utilized. Proposed filter structure consists of 3 blocks. In the first CSD coefficient block, every possible 4 bit CSD coefficients are calculated and stored. In second processor block, multiplication is done by MUX and addition processor in terms of the binary values of filter coefficient. Finally, in third block, multiplied values are output and stored in flip-flop train. For comparison of the implementation area and power dissipation, proposed and conventional structures are implemented by using Verilog-HDL coding. In simulation, it is shown that 53.1% of the implementation area can be reduced comparison with those of the conventional structure.

Keywords

References

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