• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.12
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• pp.6017-6037
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• 2017

In a multi-resolution image encoding system, the image is encoded into a single file as a layer of bit streams, and then it is transmitted layer by layer progressively to reduce the transmission time across a low bandwidth connection. This encoding scheme is also suitable for multiple decoders, each with different capabilities ranging from a handheld device to a PC. In our previous work, we proposed an edge adaptive hierarchical interpolation algorithm for multi-resolution image coding system. In this paper, we enhanced its compression efficiency by adding three major components. First, its prediction accuracy is improved using context adaptive error modeling as a feedback. Second, the conditional probability of prediction errors is sharpened by removing the sign redundancy among local prediction errors by applying sign flipping. Third, the conditional probability is sharpened further by reducing the number of distinct error symbols using error remapping function. Experimental results on benchmark data sets reveal that the enhanced algorithm achieves a better compression bit rate than our previous algorithm and other algorithms. It is shown that compression bit rate is much better for images that are rich in directional edges and textures. The enhanced algorithm also shows better rate-distortion performance and visual quality at the intermediate stages of progressive image transmission.

• Journal of Radiation Protection and Research
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• v.12 no.1
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• pp.12-25
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• 1987

A basic multichannel analyser (MCA) system have been designed and constructed with the successive approximation type ADC (Analog to Digital Converter). Linear Gate, window, and palse stretcher consist of mainly linear and logic IC's, and are properly combined together to achieve short dead time and good linearity of the system. ADC 1211 (analysing time: $120{\mu}sec$) and S-RAM (static random acess memory) 6264 are used in ADC module. Two 6264 memories are connected in parallel in order to-provide enough counting capacity ($2^{16}-1$). Interfaced microcomputer Apple II controls this system and analizes the counted data. The system is tested by input pulses between 0V to 10V from oscillator.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.11
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• pp.1124-1131
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• 2014

The chirp spread spectrum (CSS) technique that transmits data signal by using a chirp signal is often used for maritime wireless communication systems such as sound detection radar systems for submarines. However, maritime multipath environment could reduce the data rate of the CSS system. To tackle the problem, an overlap-based CSS transmission scheme is proposed and analyzed in this paper: Based on the approximated Gaussian Q function, we derive a closed form expression of the bit error rate (BER) of the proposed overlap-based CSS system and investigate the mathematical relationship between the number of overlaps and the intersymbol interference (ISI).

• International Journal of Computer Science & Network Security
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• v.22 no.7
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• pp.427-442
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• 2022

MP3 is one of the most widely used file formats for encoding and representing audio data. One of the reasons for this popularity is their significant ability to reduce audio file sizes in comparison to other encoding techniques. Additionally, other reasons also include ease of implementation, its availability and good technical support. Steganography is the art of shielding the communication between two parties from the eyes of attackers. In steganography, a secret message in the form of a copyright mark, concealed communication, or serial number can be embedded in an innocuous file (e.g., computer code, video film, or audio recording), making it impossible for the wrong party to access the hidden message during the exchange of data. This paper describes a new steganography algorithm for encoding secret messages in MP3 audio files using an improved least significant bit (LSB) technique with high embedding capacity. Test results obtained shows that the efficiency of this technique is higher compared to other LSB techniques.

• The Journal of the Acoustical Society of Korea
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• v.26 no.5
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• pp.214-219
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• 2007

This paper proposes a new IFFT(Inverse Fast Fourier Transform) algorithm, which is proper for IMDCT(Inverse Modified Discrete Cosine Transform) of MPEG-2 AAC(Advanced Audio Coding) decoder. The $2^n$(N-point) type IMDCT is the most powerful among many IMDCT algorithms, however it includes IFFT that requires many calculation cycles. The IFFT used in $2^n$(N-point) type IMDCT employ the bit-reverse data arrangement of inputs and N/4-point complex IFFT to reduce the calculation cycles. We devised a new data arrangement method of IFFT input and $N/4^{n+1}$-type IFFT and thus we can reduce multiplication cycles, addition cycles, and ROM size.

• Journal of Korea Multimedia Society
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• v.13 no.11
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• pp.1687-1697
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• 2010

The USIM-based AKA authentication process is essential to a mobile payment system on smart phone environment. In this paper a payment protocol and an AKA module are designed for mobile payment system which is suitable for openness smart phone environment. The payment protocol designs the cross authentication among components of the mobile payment system to improve the reliability of the components. The AKA module of mobile payment system based on 3GPP-AKA protocol prevents the exposure of IMSI by creating the SSK(Shared Secure Key) through advance registration and solves the SQN(SeQuence Number) synchronization problem by using timestamp. Also, by using the SSK instead of authentication vector between SN and authentication center, the existing bandwidth $(688{\times}N){\times}R$ bit between them is reduced to $320{\times}R$ bit or $368{\times}R$ bit. It creates CK and IK which are message encryption key by using OT-SSK(One-Time SSK) between MS and SN. In addition, creating the new OT-SSK whenever MS is connected to SN, it prevents the data replay attack.

• Journal of Korea Society of Industrial Information Systems
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• v.16 no.3
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• pp.23-33
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• 2011

In this paper, the wavelet image coder, that can encode the bit-level information of wavelet coefficients, is proposed. The proposed coder is used the modified EZW algorithm and significant coefficient array that has bit level information of the wavelet coefficients to reduce the memory requirement in coding process. The significant coefficient array is two dimensional data structure that has bit level information of the wavelet coefficients. The proposed algorithm performs the coding of the significance coefficients and coding of bit level information of wavelet coefficients at a time by using the significant coefficient array. Experimental results show a better or similar performance of the proposed method when compared with conventional embedded wavelet coding algorithm. Especially, the proposed algorithm performs stably without image distortion at various bit rates with minimum memory usage by using the significant coefficient array.

• Journal of IKEEE
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• v.19 no.1
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• pp.45-51
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• 2015

Recently, as WPAN (Wireless Personal Area Network) becomes the necessary feature in IoT (Internet of Things) devices, the importance of data security also hugely increases. In this paper, we present the low-complexity 128-bit AES-$CCM^*$ hardware IP for IEEE 802.15.4 standard. For low-cost and low-power implementation which is essentially required in IoT devices, we propose two optimization methods. First, the folded AES(Advanced Encryption Standard) processing core with 8-bit datapath is presented where composite field arithmetic is adopted for reduced hardware complexity. In addition, to support $CCM^*$ mode defined in IEEE 802.15.4, we propose the mode-toggling architecture which requires less hardware resources and processing time. With the proposed methods, the gate count of the proposed AES-$CCM^*$ IP can be lowered up to 57% compared to the conventional architecture.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.5
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• pp.1155-1163
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• 2010

An algorithm of the conventional wavelet shift keying is carried out that the scaling function and wavelet are encoded to 1(mark) and 0(space) for the input binary data, respectively. Two bit modulation technique which uses four carrier frequencies is existed. Four carrier frequencies are defined as scaling function, inversed scaling function, wavelet, and inversed wavelet, which are encoded to 10, 11, 00 and 01, respectively. In this paper, we defined 4-ary SWSK (4-ary scaling wavelet shift keying) which is two bit modulation, and it is derived to the probability of bit error and symbol error of the defined system from QPSK. In order to analyze to the performance of 4-ary SWSK, we are obtained in terms of the probability of bit error and symbol error for QPSK (quadrature phase shift keying), MFSK(M-ary frequency shift keying) and proposed method. As a results of simulation, we confirmed that the proposed method was superior to the performance in terms of the probability of bit error and symbol error.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.16 no.6
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• pp.15-24
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• 2006

Recently, the importance of the area efficient implementation of cryptographic algorithm for the portable device is increasing. Previous ARIA(Academy, Research Institute, Agency) implementation styles that usually concentrate upon speed, we not suitable for mobile devices in area and power aspects. Thus in this paper, we present an area efficient AR processor which use 32-bit architecture. Using new implementation technique of diffusion layer, the proposed processor has 11301 gates chip area. For 128-bit master key, the ARIA processor needs 87 clock cycles to generate initial round keys, n8 clock cycles to encrypt, and 256 clock cycles to decrypt a 128-bit block of data. Also the processor supports 192-bit and 256-bit master keys. These performances are 7% in area and 13% in speed improved results from previous cases.