• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.6
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• pp.493-498
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• 2005

Al doped Zinc Oxide, which is widely used as a transparent conductor in opto-electronic devices. In this paper, we find that the lateral variations of the parameters of the ZnO:Al films prepared by the rf magnetron sputtering can be reduced to acceptable levels by optimising the deposition parameters. The effect of bias voltage on the electrical, optical and morphological properties were investigated experimentally. we investigated sample properties of Bias Voltage change in 0 to 50 V.

• Korean Journal of Materials Research
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• v.16 no.1
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• pp.25-29
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• 2006

Vertical growth of iridium-catalyzed carbon nanofibers could be selectively grown on the MgO substrate using microwave plasma-enhanced chemical vapor deposition method. Growth positions of the iridium-catalyzed carbon nanofibers on the MgO substrate could be manipulated according to the applied bias voltage. At-150 V, the carbon nanofibers growth was confined only at the corner area of the substrate. Based on these results, we discussed the cause for the confinement of the vertically grown carbon nanofibers on the specific area of the MgO substrate as a function of the applied bias voltage.

• Journal of the Korean institute of surface engineering
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• v.41 no.6
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• pp.287-291
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• 2008

Reactively magnetron sputtered TiN films were deposited on Si wafers under varying bias voltage and characterized by X-ray diffraction, field-emission scanning electron microscopy and Nanoindentation. The films deposited under an Ar + $N_2$ atmosphere exhibited a mixed (200)-(111) orientation with a strong (200) texture, which subsequently changed to a strong (111) texture with increasing bias voltage. The changes in texture and grain size of the TiN thin films are due to one or a combination of factors such as strain energy, surface free energy, surface diffusivity and adatom mobility. The influence of each factor depends on the processing conditions. The average deposition rate and grain size were calculated from FE-SEM images of the films indicating that the deposition rate was lower at the films deposited under bias voltage.

• Proceedings of the Korean Magnestics Society Conference
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• 1997.11a
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• pp.30-31
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• 1997

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 1998.05a
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• pp.152-152
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• 1998

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2002.06a
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• pp.195-199
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• 2002

This paper describes the effect of substrate back bias of CMOS Inverter. When the substrate back bias applied in body, the MOS transistor threshold voltage increased and drain saturation current decreased. The back gate reverse bias or substrate bias has been widely utilized and the following advantage has suppressing subthreshold leakage, lowering parasitic junction capacitance, preventing latch up or parasitic bipolar transistor, etc. When the reverse voltage applied substrate, this paper stimulated the propagation delay time CMOS inverter.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2007.04a
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• pp.122-123
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• 2007

Bias voltage를 달리하여 cathodic arc plasma 방법으로 Si 기판 위에 성장시킨 TiCrAlSiN 코팅막의 미세구조를 투과전자현미경으로 관찰하였다. -200 V에서 0 V로 bias voltage가 변화함에 따라 'nano-multilayered' 구조가 무너지면서 '주상형(columnar)'구조로 코팅막의 미세구조가 변함을 알 수 있었고, EDS line scan을 통해 multilayer의 화학적 조성 변화를 확인하였다.

• Journal of the Korean Vacuum Society
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• v.13 no.1
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• pp.22-28
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• 2004

Ta films were deposited on Si (100) substrates at zero substrate bias voltage and a substrate bias voltage of -125 V ($V_{s}$ = -125 V) using a non-mass separated ion beam deposition system. To investigate the effect of the negative substrate bias voltage on the impurity concentration in the Ta films, secondary ion mass spectrometry (SIMS) was used to determine impurities in the Ta films. By the SIMS depth profiles with $Cs^{+}$ cluster ion beam, high intensities of O, C and Si were clearly found in the Ta film at $V_{s}$ = 0 V, whereas these impurities remarkably decreased in the Ta film at $V_{s}$ = -125 V. Furthermore, from the SIMS result with $Cs^{+}$ and $O_2^{+}$ ion beams, it was found that applying the negative substrate bias voltage could affect individual impurity contents in the Ta films during the deposition. Discussions concerning the effect of the negative substrate bias voltage on the impurity concentration of Ta films will be described in details.

• Korean Journal of Materials Research
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• v.25 no.5
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• pp.253-257
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• 2015

The implanting of metal products is performed with numerous surface treatments because of toxicity and adhesion. Recently, the surface modification of metal products has been actively studied by coating the surface of the TiC or TiN film. We prepared a Ti(10%)Ag Target which may be used in dental oral material by, using the AIP(arc ion plating) system TiAgN coating layer that was deposited on Ti g.23. The purpose of this study was to establish the optimal bias voltage conditions of the coated TiAgN layer formed by the AIP process. The TiAgN coatings were prepared with different bias voltage parameters (0V to -500V) to investigate the effect of bias voltage on their mechanical and chemical properties. The SEM(scanning electron microscope), EDS(energy dispersive X-ray spectrometer), XRD(X-ray diffraction), micro-hardness, and potentiodynamic polarization were measured and the surface characteristics of the TiAgN coating layers were evaluated. The TiAgN coating layer had different mechanical characteristics based on the bias voltage, which also showed differences in thickness and composition.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.2
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• pp.104-110
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• 2008

In this paper we proposed a new source-drain structure for N-type MOSFET which can suppress the output resistance reduction of a device in saturation region due to soft break down leakage at high drain voltage when the gate is biased around relatively low voltage. When a device is generally used as a switch at high gate bias the current level is very important for the operation. but in electronic circuit like an amplifier we should mainly consider the output resistance for the stable voltage gain and the operation at low gate bias. Hence with T-SUPREM simulator we designed devices that operate at low gate bias and high gate bias respectively without a extra photo mask layer and ion-implantation steps. As a result the soft break down leakage due to impact ionization is reduced remarkably and the output resistance increases about 3 times in the device that operates at the low gate bias. Also it is expected that electronic circuit designers can easily design a circuit using the offered N-type MOSFET device with the better output resistance.