• 제목/요약/키워드: bias ratio

검색결과 639건 처리시간 0.152초

가변 위상변위 스위칭방식을 적용한 연료전지용 변압기 직렬형 DC/DC 컨버터 (Series Connected DC/DC Converter for Fuel Cell System using Variable Phase Shift Switching Method)

  • 박노식;권순재;박성준
    • 전력전자학회논문지
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    • 제13권6호
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    • pp.461-468
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    • 2008
  • 본 논문에서는 연료전지용 전력변환 장치에서 높은 승압비를 구현하기 위하여 절연형 풀브릿지 컨버터의 고주파 변압기 2차측을 직렬로 연결한 새로운 DC/DC 컨버터와 이에 적합한 가변 위상변위 스위칭 방식을 제안하였다. 제안된 컨버터는 기존 방식에 비해 정류부와 필터부의 일원화가 가능한 구조로 출력레벨의 증가를 위해 컨버터의 수를 증가 하더라도, 수동소자의 수를 대폭 줄일 수 있다. 제안된 직렬 방식의 컨버터의 출력전압은 기존의 일정위상변위 스위칭 방식으로는 극성이 반대로 되는 구간이 발생하므로, 제안된 전력변환기에 적합한 간단한 가변 위상 변위 스위칭 방식을 적용함으로써, 출력전압의 감소문제를 해결하였으며, 시뮬레이션과 실험을 통하여 제안된 방식의 타당성을 검증하였다.

FCVA 방법으로 증착된 DLC 박막의 열처리에 따른 구조적 물성 분석 (Effects of Thermal Treatment on Structural Properties of DLC Films Deposited by FCVA Method)

  • 김영도;장석모;박창균;엄현석;박진석
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제52권8호
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    • pp.325-329
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    • 2003
  • Effects of thermal treatment on the structural properties of diamond-like carbon (DU) films were examined. The DLC films were deposited by using a modified filtered cathodic vacuum arc (FCVA) deposition system and by varying the negative substrate bias voltage, deposition time, and nitrogen flow rate. Thermal treatment on DLC films was performed using a rapid thermal annealing (RTA) process at $600^{\circ}C$ for 2min. Raman spectroscopy, x-ray photoemission spectroscopy (XPS), atomic force microscope (AFM), and surface profiler were used to characterize the I$_{D}$I$_{G}$ intensity ratio, sp$^3$ hybrid carbon fraction, internal stress, and surface roughness. It was found for all the deposited DLC films that the RTA-treatment results in the release of internal compressive stress, while at the same time it leds to the decrease of sp$^3$ fraction and the increase of I$_{D}$I$_{G}$ intensity ratio. It was also suggested that the thermal treatment effect on the structural property of DLC films strongly depends on the diamond-like nature (i.e., sp$^3$ fraction) of as-deposited film.ed film.

A dual-path high linear amplifier for carrier aggregation

  • Kang, Dong-Woo;Choi, Jang-Hong
    • ETRI Journal
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    • 제42권5호
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    • pp.773-780
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    • 2020
  • A 40 nm complementary metal oxide semiconductor carrier-aggregated drive amplifier with high linearity is presented for sub-GHz Internet of Things applications. The proposed drive amplifier consists of two high linear amplifiers, which are composed of five differential cascode cells. Carrier aggregation can be achieved by switching on both the driver amplifiers simultaneously and combining the two independent signals in the current mode. The common gate bias of the cascode cells is selected to maximize the output 1 dB compression point (P1dB) to support high-linear wideband applications, and is used for the local supply voltage of digital circuitry for gain control. The proposed circuit achieved an output P1dB of 10.7 dBm with over 22.8 dBm of output 3rd-order intercept point up to 0.9 GHz and demonstrated a 55 dBc adjacent channel leakage ratio (ACLR) for the 802.11af with -5 dBm channel power. To the best of our knowledge, this is the first demonstration of the wideband carrier-aggregated drive amplifier that achieves the highest ACLR performance.

ON/OFF 전류비를 향상시킨 새로운 bottom-gate 구조의 다결정 실리콘 박막 트랜지스터 (A Novel Bottom-Gate Poly-Si Thin Film Transistors with High ON/OFF Current Ratio)

  • 전재홍;최권영;박기찬;한민구
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제48권5호
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    • pp.315-318
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    • 1999
  • We have proposed and fabricated the new bottom-gated polycrystalline silicon (poly-Si) thin film transistor (TFT) with a partial amorphous-Si region by employing the selective laser annealing. The channel layer of the proposed TFTs is composed of poly-Si region in the center and a-Si region in the edge. The TEM image shows that the local a-Si region is successfully fabricated by the effective cut out of the incident laser light in the upper a-Si layer. Our experimental results show that the ON/OFF current ratio is increased significantly by more than three orders in the new poly-Si TFT compared with conventional poly-Si TFT. The leakage current is decreased significantly due to the highly resistive a-Si re TFTs while the ON-series resistance of the local a-Si is reduced significantly due to the considerable inducement of electron carriers by the positive gate bias, so that the ON-current is not decreased much.

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정현파 신호 주파수 추정 알고리즘의 추정 정확도 비교 연구 (A Study on performance comparison of frequency estimators for sinusoid)

  • 조현진
    • 한국음향학회지
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    • 제37권6호
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    • pp.457-467
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    • 2018
  • 본 논문은 정현파 신호에 대해 고해상도 주파수 추정이 가능한 알고리즘들의 성능을 비교 분석하였다. 비교 대상 알고리즘은 총 5가지로 DFT(Discrete Fourier Transform - 성능 평가 기준), Jacobsen, Candan, 재할당(Reassignment) 알고리즘 및 Cedron 알고리즘이다. 각 알고리즘의 성능을 SNR(Signal to Noise Ratio), 윈도우 함수, 윈도우 길이 등의 요소를 변화시켜가며 성능을 측정하였다. 알고리즘의 성능 평가는 편의 및 오차(Mean Square Error, MSE), 분산을 이용하여 측정하였으며, 실험결과 Cedron 알고리즘이 좋은 성능을 보였다. 실제 공학문제에서의 활용을 위해서는 각 알고리즘별로 보다 다양한 조건에서 실험 결과를 분석하고 개선시킬 필요가 있다.

Preliminary strong ground motion simulation at seismic stations within nuclear power plant sites in South Korea by a scenario earthquake on the causative fault of 2016 Gyeongju earthquake

  • Choi, Hoseon
    • Nuclear Engineering and Technology
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    • 제54권7호
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    • pp.2529-2539
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    • 2022
  • Stochastic and an empirical Green's function (EGF) methods are preliminarily applied to simulate strong ground motions (SGMs) at seismic stations within nuclear power plant (NPP) sites in South Korea by an assumed large earthquake with MW6.5 (scenario earthquake) on the causative fault of the 2016 Gyeongju earthquake with MW5.5 (mainshock). In the stochastic method, a ratio of spectral amplitudes of observed and simulated waveforms for the mainshock is assumed to be an adjustment factor. In the EGF method, SGMs by the mainshock are simulated assuming SGMs by the 2016 Gyeongju earthquake with MW5.0 (foreshock) as the EGF. To simulate SGMs by the scenario earthquake, a ratio of fault length to width is assumed to be 2:1 in the stochastic method, and SGMs by the mainshock are assumed to be EGF in the EGF method. The results are similar based on a bias of the simulated response spectra by the two methods, and the simulated response spectra by the two methods exceeded commonly standard design response spectra anchored at 0.3 g of NPP sites slightly at a frequency band above 4 Hz, but considerable attention to interpretation is required since it is an indirect comparison.

인공호흡기 회로 교환주기가 인공호흡기 관련 폐렴에 미치는 영향에 관한 메타 분석 (A Meta-Analysis of the Ventilator Circuit Change Period on Ventilator-Associated Pneumonia)

  • 송주현;김경희
    • 임상간호연구
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    • 제16권3호
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    • pp.111-121
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    • 2010
  • Purpose: This meta-analysis was aimed to investigate the evidence of proper period of the ventilator circuit change using existing research. Methods: For this study, 14 published studies between 1995 and 2010 were tested by Macaskill, Funnel Plot, the Odds Ratio of DerSimonian and Laird, Fisher and Liptak analysis. Results: There were no publication bias found in the subjects. The results of the meta-analysis demonstrated no statistically significant differences were observed in neither the Odds Ratio (OR=1.18, 95% CI=0.94-1.47) of the frequency of ventilator-associated pneumonia and the mortality based on the period of the ventilator circuit change (Fisher p=.332, Liptak p=.498), nor the ventilation duration of ventilator (Fisher p=.843, Liptak p=.506), and the hospital length of stay (Fisher p=.254, Liptak p=.480). Conclusion: In order to present more concrete guidelines on the period of the ventilator circuit change, further research is warranted to thoroughly control confounding variables which related to the periods of the ventilator circuit change.

광대역 단상 Lock-in 증폭기 DLTS 시스템을 이용한 MOS Capacitor 계면상태 측정 (Measurements of Interface States In a MOS Capacitor by DLTS System Using Wideband Monophase Lock-in Amplifier)

  • 배동건;정상구
    • 대한전자공학회논문지
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    • 제23권6호
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    • pp.807-813
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    • 1986
  • Measurements of interface states in a MOS capacitor by DLTS system using wideband monophase lock-in amplifier are discussed. A new signal analysis method that takes into account the bias pulse width and the gate off width is presented to remove the errors in the measured parameters of interface states resulting from the traditional method which neglects the effect of those widths. Theoretical calculations are made for the parameters related to the rate window, signal to noise ratio, and the energy resolution. On the grounds of this discussion, interface states of the MOS capacitor on p-type substrate of (110) orentation are measured with the optimal gate-off width with respect to the S/N ratio and the energy resolution. The results are interface state density of the order of 10**10 (cm-\ulcornereV**-1) to 10**11 (cm-\ulcornereV**-1) in the energy range of Ev+0.15(dV) to Ev+0.5(eV), and constant capture cross section of the order of 10**-16 (cm\ulcorner.

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EFFECT OF Mg RATIO ON THE EXTRACTION OF Dy FROM (Nd,Dy)-Fe-B PERMANENT MAGNET USING LIQUID Mg

  • SANGMIN PARK;SUN-WOO NAM;JU-YOUNG CHO;SANG-HOON LEE;SEUNG-KEUN HYUN;TAEK-SOO KIM
    • Archives of Metallurgy and Materials
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    • 제65권4호
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    • pp.1281-1285
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    • 2020
  • Recently, since the demand of rare earth permanent magnet for high temperature applications such as an electric motor has increased, dysprosium (Dy), a heavy rare earth element, is becoming important due to severe bias in its production. To fulfill the increasing need of Dy, recycling offers as a promising alternative. In recycling of rare earths, Hydro-metallurgical extraction method is mainly used however it has adverse environmental effects. Liquid metal extraction on the other hand, is an eco-friendly and simple method as far as the reduction of rare earth metal oxide is concerned. Therefore, liquid metal extraction was studied in this research as an alternative to the hydro-metallurgical recycling method. Magnesium (Mg) is selected as solvent metal because it doesn't form intermetallic compounds with Fe, B and has a low melting and low boiling point. Extraction behavior of Dy in (Nd,Dy)-Fe-B magnet is observed and effect of Mg ratio on extraction of Dy is confirmed.

저잡음 CMOS 이미지 센서를 위한 10㎛ 컬럼 폭을 가지는 단일 비트 2차 델타 시그마 모듈레이터 (A Single-Bit 2nd-Order Delta-Sigma Modulator with 10-㎛ Column-Pitch for a Low Noise CMOS Image Sensor)

  • 권민우;천지민
    • 한국정보전자통신기술학회논문지
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    • 제13권1호
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    • pp.8-16
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    • 2020
  • 본 논문에서는 polymerase chain reaction (PCR) 응용에 적합한 저잡음 CMOS 이미지 센서에 사용되는 컬럼-패러럴 analog-to-digital converter (ADC) 어레이를 위한 cascaded-of-integrator feedforward (CIFF) 구조의 단일 비트 2차 델타-시그마 모듈레이터를 제안하였다. 제안된 모듈레이터는 CMOS 이미지 센서에 입사된 빛의 신호에 해당하는 픽셀 출력 전압을 디지털 신호로 변환시키는 컬럼-패러럴 ADC 어레이를 위해 하나의 픽셀 폭과 동일한 10㎛ 컬럼 폭 내에 2개의 스위치드 커패시터 적분기와 단일 비트 비교기로 구현하였다. 또한, 모든 컬럼의 모듈레이터를 동시에 구동하기 위한 주변 회로인 비중첩 클록 발생기 및 바이어스 회로를 구성하였다. 제안된 델타-시그마 모듈레이터는 110nm CMOS 공정으로 구현하였으며 12kHz 대역폭에 대해 418의 oversampling ratio (OSR)로 88.1dB의 signal-to-noise-and-distortion ratio (SNDR), 88.6dB의 spurious-free dynamic range (SFDR) 및 14.3비트의 effective-number-of-bits (ENOB)을 달성하였다. 델타 시그마 모듈레이터의 면적 및 전력 소비는 각각 970×10 ㎛2 및 248㎼이다.